\section{aversive\_\-10-03-12/include/aversive/parts/ATmega32U6.h File Reference}
\label{ATmega32U6_8h}\index{aversive\_\-10-03-12/include/aversive/parts/ATmega32U6.h@{aversive\_\-10-03-12/include/aversive/parts/ATmega32U6.h}}
\subsection*{Defines}
\begin{CompactItemize}
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-DIV\_\-0}~0
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-DIV\_\-1}~1
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-DIV\_\-8}~2
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-DIV\_\-64}~3
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-DIV\_\-256}~4
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-DIV\_\-1024}~5
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-DIV\_\-FALL}~6
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-DIV\_\-RISE}~7
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-REG\_\-0}~0
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-REG\_\-1}~1
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-REG\_\-2}~8
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-REG\_\-3}~64
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-REG\_\-4}~256
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-REG\_\-5}~1024
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-REG\_\-6}~-1
\item 
\#define {\bf TIMER0\_\-PRESCALER\_\-REG\_\-7}~-2
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-DIV\_\-0}~0
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-DIV\_\-1}~1
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-DIV\_\-8}~2
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-DIV\_\-64}~3
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-DIV\_\-256}~4
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-DIV\_\-1024}~5
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-DIV\_\-FALL}~6
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-DIV\_\-RISE}~7
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-REG\_\-0}~0
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-REG\_\-1}~1
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-REG\_\-2}~8
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-REG\_\-3}~64
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-REG\_\-4}~256
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-REG\_\-5}~1024
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-REG\_\-6}~-1
\item 
\#define {\bf TIMER1\_\-PRESCALER\_\-REG\_\-7}~-2
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-DIV\_\-0}~0
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-DIV\_\-1}~1
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-DIV\_\-8}~2
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-DIV\_\-32}~3
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-DIV\_\-64}~4
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-DIV\_\-128}~5
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-DIV\_\-256}~6
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-DIV\_\-1024}~7
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-REG\_\-0}~0
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-REG\_\-1}~1
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-REG\_\-2}~8
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-REG\_\-3}~32
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-REG\_\-4}~64
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-REG\_\-5}~128
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-REG\_\-6}~256
\item 
\#define {\bf TIMER2\_\-PRESCALER\_\-REG\_\-7}~1024
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-DIV\_\-0}~0
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-DIV\_\-1}~1
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-DIV\_\-8}~2
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-DIV\_\-64}~3
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-DIV\_\-256}~4
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-DIV\_\-1024}~5
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-DIV\_\-FALL}~6
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-DIV\_\-RISE}~7
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-REG\_\-0}~0
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-REG\_\-1}~1
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-REG\_\-2}~8
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-REG\_\-3}~64
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-REG\_\-4}~256
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-REG\_\-5}~1024
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-REG\_\-6}~-1
\item 
\#define {\bf TIMER3\_\-PRESCALER\_\-REG\_\-7}~-2
\item 
\#define {\bf TIMER0\_\-AVAILABLE}
\item 
\#define {\bf TIMER0A\_\-AVAILABLE}
\item 
\#define {\bf TIMER0B\_\-AVAILABLE}
\item 
\#define {\bf TIMER1\_\-AVAILABLE}
\item 
\#define {\bf TIMER1A\_\-AVAILABLE}
\item 
\#define {\bf TIMER1B\_\-AVAILABLE}
\item 
\#define {\bf TIMER1C\_\-AVAILABLE}
\item 
\#define {\bf TIMER2\_\-AVAILABLE}
\item 
\#define {\bf TIMER2A\_\-AVAILABLE}
\item 
\#define {\bf TIMER2B\_\-AVAILABLE}
\item 
\#define {\bf TIMER3\_\-AVAILABLE}
\item 
\#define {\bf TIMER3A\_\-AVAILABLE}
\item 
\#define {\bf TIMER3B\_\-AVAILABLE}
\item 
\#define {\bf TIMER3C\_\-AVAILABLE}
\item 
\#define {\bf SIG\_\-OVERFLOW0\_\-NUM}~0
\item 
\#define {\bf SIG\_\-OVERFLOW1\_\-NUM}~1
\item 
\#define {\bf SIG\_\-OVERFLOW2\_\-NUM}~2
\item 
\#define {\bf SIG\_\-OVERFLOW3\_\-NUM}~3
\item 
\#define {\bf SIG\_\-OVERFLOW\_\-TOTAL\_\-NUM}~4
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE0A\_\-NUM}~0
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE0B\_\-NUM}~1
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE1A\_\-NUM}~2
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE1B\_\-NUM}~3
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE1C\_\-NUM}~4
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE2A\_\-NUM}~5
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE2B\_\-NUM}~6
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE3A\_\-NUM}~7
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE3B\_\-NUM}~8
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE3C\_\-NUM}~9
\item 
\#define {\bf SIG\_\-OUTPUT\_\-COMPARE\_\-TOTAL\_\-NUM}~10
\item 
\#define {\bf PWM0A\_\-NUM}~0
\item 
\#define {\bf PWM0B\_\-NUM}~1
\item 
\#define {\bf PWM1A\_\-NUM}~2
\item 
\#define {\bf PWM1B\_\-NUM}~3
\item 
\#define {\bf PWM1C\_\-NUM}~4
\item 
\#define {\bf PWM2A\_\-NUM}~5
\item 
\#define {\bf PWM2B\_\-NUM}~6
\item 
\#define {\bf PWM3A\_\-NUM}~7
\item 
\#define {\bf PWM3B\_\-NUM}~8
\item 
\#define {\bf PWM3C\_\-NUM}~9
\item 
\#define {\bf PWM\_\-TOTAL\_\-NUM}~10
\item 
\#define {\bf SIG\_\-INPUT\_\-CAPTURE1\_\-NUM}~0
\item 
\#define {\bf SIG\_\-INPUT\_\-CAPTURE3\_\-NUM}~1
\item 
\#define {\bf SIG\_\-INPUT\_\-CAPTURE\_\-TOTAL\_\-NUM}~2
\item 
\#define {\bf UEBCHX\_\-0\_\-REG}~UEBCHX
\item 
\#define {\bf UEBCHX\_\-1\_\-REG}~UEBCHX
\item 
\#define {\bf UEBCHX\_\-2\_\-REG}~UEBCHX
\item 
\#define {\bf MUX0\_\-REG}~ADMUX
\item 
\#define {\bf MUX1\_\-REG}~ADMUX
\item 
\#define {\bf MUX2\_\-REG}~ADMUX
\item 
\#define {\bf MUX3\_\-REG}~ADMUX
\item 
\#define {\bf MUX4\_\-REG}~ADMUX
\item 
\#define {\bf ADLAR\_\-REG}~ADMUX
\item 
\#define {\bf REFS0\_\-REG}~ADMUX
\item 
\#define {\bf REFS1\_\-REG}~ADMUX
\item 
\#define {\bf SUSPE\_\-REG}~UDIEN
\item 
\#define {\bf SOFE\_\-REG}~UDIEN
\item 
\#define {\bf EORSTE\_\-REG}~UDIEN
\item 
\#define {\bf WAKEUPE\_\-REG}~UDIEN
\item 
\#define {\bf EORSME\_\-REG}~UDIEN
\item 
\#define {\bf UPRSME\_\-REG}~UDIEN
\item 
\#define {\bf WDP0\_\-REG}~WDTCSR
\item 
\#define {\bf WDP1\_\-REG}~WDTCSR
\item 
\#define {\bf WDP2\_\-REG}~WDTCSR
\item 
\#define {\bf WDE\_\-REG}~WDTCSR
\item 
\#define {\bf WDCE\_\-REG}~WDTCSR
\item 
\#define {\bf WDP3\_\-REG}~WDTCSR
\item 
\#define {\bf WDIE\_\-REG}~WDTCSR
\item 
\#define {\bf WDIF\_\-REG}~WDTCSR
\item 
\#define {\bf EEDR0\_\-REG}~EEDR
\item 
\#define {\bf EEDR1\_\-REG}~EEDR
\item 
\#define {\bf EEDR2\_\-REG}~EEDR
\item 
\#define {\bf EEDR3\_\-REG}~EEDR
\item 
\#define {\bf EEDR4\_\-REG}~EEDR
\item 
\#define {\bf EEDR5\_\-REG}~EEDR
\item 
\#define {\bf EEDR6\_\-REG}~EEDR
\item 
\#define {\bf EEDR7\_\-REG}~EEDR
\item 
\#define {\bf OCR0B\_\-0\_\-REG}~OCR0B
\item 
\#define {\bf OCR0B\_\-1\_\-REG}~OCR0B
\item 
\#define {\bf OCR0B\_\-2\_\-REG}~OCR0B
\item 
\#define {\bf OCR0B\_\-3\_\-REG}~OCR0B
\item 
\#define {\bf OCR0B\_\-4\_\-REG}~OCR0B
\item 
\#define {\bf OCR0B\_\-5\_\-REG}~OCR0B
\item 
\#define {\bf OCR0B\_\-6\_\-REG}~OCR0B
\item 
\#define {\bf OCR0B\_\-7\_\-REG}~OCR0B
\item 
\#define {\bf SUSPI\_\-REG}~UDINT
\item 
\#define {\bf SOFI\_\-REG}~UDINT
\item 
\#define {\bf EORSTI\_\-REG}~UDINT
\item 
\#define {\bf WAKEUPI\_\-REG}~UDINT
\item 
\#define {\bf EORSMI\_\-REG}~UDINT
\item 
\#define {\bf UPRSMI\_\-REG}~UDINT
\item 
\#define {\bf EPRST0\_\-REG}~UERST
\item 
\#define {\bf EPRST1\_\-REG}~UERST
\item 
\#define {\bf EPRST2\_\-REG}~UERST
\item 
\#define {\bf EPRST3\_\-REG}~UERST
\item 
\#define {\bf EPRST4\_\-REG}~UERST
\item 
\#define {\bf EPRST5\_\-REG}~UERST
\item 
\#define {\bf EPRST6\_\-REG}~UERST
\item 
\#define {\bf ALLOC\_\-REG}~UECFG1X
\item 
\#define {\bf EPBK0\_\-REG}~UECFG1X
\item 
\#define {\bf EPBK1\_\-REG}~UECFG1X
\item 
\#define {\bf EPSIZE0\_\-REG}~UECFG1X
\item 
\#define {\bf EPSIZE1\_\-REG}~UECFG1X
\item 
\#define {\bf EPSIZE2\_\-REG}~UECFG1X
\item 
\#define {\bf OCR2B\_\-0\_\-REG}~OCR2B
\item 
\#define {\bf OCR2B\_\-1\_\-REG}~OCR2B
\item 
\#define {\bf OCR2B\_\-2\_\-REG}~OCR2B
\item 
\#define {\bf OCR2B\_\-3\_\-REG}~OCR2B
\item 
\#define {\bf OCR2B\_\-4\_\-REG}~OCR2B
\item 
\#define {\bf OCR2B\_\-5\_\-REG}~OCR2B
\item 
\#define {\bf OCR2B\_\-6\_\-REG}~OCR2B
\item 
\#define {\bf OCR2B\_\-7\_\-REG}~OCR2B
\item 
\#define {\bf OCR2A\_\-0\_\-REG}~OCR2A
\item 
\#define {\bf OCR2A\_\-1\_\-REG}~OCR2A
\item 
\#define {\bf OCR2A\_\-2\_\-REG}~OCR2A
\item 
\#define {\bf OCR2A\_\-3\_\-REG}~OCR2A
\item 
\#define {\bf OCR2A\_\-4\_\-REG}~OCR2A
\item 
\#define {\bf OCR2A\_\-5\_\-REG}~OCR2A
\item 
\#define {\bf OCR2A\_\-6\_\-REG}~OCR2A
\item 
\#define {\bf OCR2A\_\-7\_\-REG}~OCR2A
\item 
\#define {\bf SPDR0\_\-REG}~SPDR
\item 
\#define {\bf SPDR1\_\-REG}~SPDR
\item 
\#define {\bf SPDR2\_\-REG}~SPDR
\item 
\#define {\bf SPDR3\_\-REG}~SPDR
\item 
\#define {\bf SPDR4\_\-REG}~SPDR
\item 
\#define {\bf SPDR5\_\-REG}~SPDR
\item 
\#define {\bf SPDR6\_\-REG}~SPDR
\item 
\#define {\bf SPDR7\_\-REG}~SPDR
\item 
\#define {\bf SPI2X\_\-REG}~SPSR
\item 
\#define {\bf WCOL\_\-REG}~SPSR
\item 
\#define {\bf SPIF\_\-REG}~SPSR
\item 
\#define {\bf ICR1H0\_\-REG}~ICR1H
\item 
\#define {\bf ICR1H1\_\-REG}~ICR1H
\item 
\#define {\bf ICR1H2\_\-REG}~ICR1H
\item 
\#define {\bf ICR1H3\_\-REG}~ICR1H
\item 
\#define {\bf ICR1H4\_\-REG}~ICR1H
\item 
\#define {\bf ICR1H5\_\-REG}~ICR1H
\item 
\#define {\bf ICR1H6\_\-REG}~ICR1H
\item 
\#define {\bf ICR1H7\_\-REG}~ICR1H
\item 
\#define {\bf ICR1L0\_\-REG}~ICR1L
\item 
\#define {\bf ICR1L1\_\-REG}~ICR1L
\item 
\#define {\bf ICR1L2\_\-REG}~ICR1L
\item 
\#define {\bf ICR1L3\_\-REG}~ICR1L
\item 
\#define {\bf ICR1L4\_\-REG}~ICR1L
\item 
\#define {\bf ICR1L5\_\-REG}~ICR1L
\item 
\#define {\bf ICR1L6\_\-REG}~ICR1L
\item 
\#define {\bf ICR1L7\_\-REG}~ICR1L
\item 
\#define {\bf EPINT0\_\-REG}~UEINT
\item 
\#define {\bf EPINT1\_\-REG}~UEINT
\item 
\#define {\bf EPINT2\_\-REG}~UEINT
\item 
\#define {\bf EPINT3\_\-REG}~UEINT
\item 
\#define {\bf EPINT4\_\-REG}~UEINT
\item 
\#define {\bf EPINT5\_\-REG}~UEINT
\item 
\#define {\bf EPINT6\_\-REG}~UEINT
\item 
\#define {\bf TCNT1L0\_\-REG}~TCNT1L
\item 
\#define {\bf TCNT1L1\_\-REG}~TCNT1L
\item 
\#define {\bf TCNT1L2\_\-REG}~TCNT1L
\item 
\#define {\bf TCNT1L3\_\-REG}~TCNT1L
\item 
\#define {\bf TCNT1L4\_\-REG}~TCNT1L
\item 
\#define {\bf TCNT1L5\_\-REG}~TCNT1L
\item 
\#define {\bf TCNT1L6\_\-REG}~TCNT1L
\item 
\#define {\bf TCNT1L7\_\-REG}~TCNT1L
\item 
\#define {\bf PORTD0\_\-REG}~PORTD
\item 
\#define {\bf PORTD1\_\-REG}~PORTD
\item 
\#define {\bf PORTD2\_\-REG}~PORTD
\item 
\#define {\bf PORTD3\_\-REG}~PORTD
\item 
\#define {\bf PORTD4\_\-REG}~PORTD
\item 
\#define {\bf PORTD5\_\-REG}~PORTD
\item 
\#define {\bf PORTD6\_\-REG}~PORTD
\item 
\#define {\bf PORTD7\_\-REG}~PORTD
\item 
\#define {\bf PORTE0\_\-REG}~PORTE
\item 
\#define {\bf PORTE1\_\-REG}~PORTE
\item 
\#define {\bf PORTE2\_\-REG}~PORTE
\item 
\#define {\bf PORTE3\_\-REG}~PORTE
\item 
\#define {\bf PORTE4\_\-REG}~PORTE
\item 
\#define {\bf PORTE5\_\-REG}~PORTE
\item 
\#define {\bf PORTE6\_\-REG}~PORTE
\item 
\#define {\bf PORTE7\_\-REG}~PORTE
\item 
\#define {\bf TCNT1H0\_\-REG}~TCNT1H
\item 
\#define {\bf TCNT1H1\_\-REG}~TCNT1H
\item 
\#define {\bf TCNT1H2\_\-REG}~TCNT1H
\item 
\#define {\bf TCNT1H3\_\-REG}~TCNT1H
\item 
\#define {\bf TCNT1H4\_\-REG}~TCNT1H
\item 
\#define {\bf TCNT1H5\_\-REG}~TCNT1H
\item 
\#define {\bf TCNT1H6\_\-REG}~TCNT1H
\item 
\#define {\bf TCNT1H7\_\-REG}~TCNT1H
\item 
\#define {\bf PORTC0\_\-REG}~PORTC
\item 
\#define {\bf PORTC1\_\-REG}~PORTC
\item 
\#define {\bf PORTC2\_\-REG}~PORTC
\item 
\#define {\bf PORTC3\_\-REG}~PORTC
\item 
\#define {\bf PORTC4\_\-REG}~PORTC
\item 
\#define {\bf PORTC5\_\-REG}~PORTC
\item 
\#define {\bf PORTC6\_\-REG}~PORTC
\item 
\#define {\bf PORTC7\_\-REG}~PORTC
\item 
\#define {\bf PORTA0\_\-REG}~PORTA
\item 
\#define {\bf PORTA1\_\-REG}~PORTA
\item 
\#define {\bf PORTA2\_\-REG}~PORTA
\item 
\#define {\bf PORTA3\_\-REG}~PORTA
\item 
\#define {\bf PORTA4\_\-REG}~PORTA
\item 
\#define {\bf PORTA5\_\-REG}~PORTA
\item 
\#define {\bf PORTA6\_\-REG}~PORTA
\item 
\#define {\bf PORTA7\_\-REG}~PORTA
\item 
\#define {\bf INT0\_\-REG}~EIMSK
\item 
\#define {\bf INT1\_\-REG}~EIMSK
\item 
\#define {\bf INT2\_\-REG}~EIMSK
\item 
\#define {\bf INT3\_\-REG}~EIMSK
\item 
\#define {\bf INT4\_\-REG}~EIMSK
\item 
\#define {\bf INT5\_\-REG}~EIMSK
\item 
\#define {\bf INT6\_\-REG}~EIMSK
\item 
\#define {\bf INT7\_\-REG}~EIMSK
\item 
\#define {\bf UDR1\_\-0\_\-REG}~UDR1
\item 
\#define {\bf UDR1\_\-1\_\-REG}~UDR1
\item 
\#define {\bf UDR1\_\-2\_\-REG}~UDR1
\item 
\#define {\bf UDR1\_\-3\_\-REG}~UDR1
\item 
\#define {\bf UDR1\_\-4\_\-REG}~UDR1
\item 
\#define {\bf UDR1\_\-5\_\-REG}~UDR1
\item 
\#define {\bf UDR1\_\-6\_\-REG}~UDR1
\item 
\#define {\bf UDR1\_\-7\_\-REG}~UDR1
\item 
\#define {\bf ISC40\_\-REG}~EICRB
\item 
\#define {\bf ISC41\_\-REG}~EICRB
\item 
\#define {\bf ISC50\_\-REG}~EICRB
\item 
\#define {\bf ISC51\_\-REG}~EICRB
\item 
\#define {\bf ISC60\_\-REG}~EICRB
\item 
\#define {\bf ISC61\_\-REG}~EICRB
\item 
\#define {\bf ISC70\_\-REG}~EICRB
\item 
\#define {\bf ISC71\_\-REG}~EICRB
\item 
\#define {\bf UEDATX\_\-0\_\-REG}~UEDATX
\item 
\#define {\bf UEDATX\_\-1\_\-REG}~UEDATX
\item 
\#define {\bf UEDATX\_\-2\_\-REG}~UEDATX
\item 
\#define {\bf UEDATX\_\-3\_\-REG}~UEDATX
\item 
\#define {\bf UEDATX\_\-4\_\-REG}~UEDATX
\item 
\#define {\bf UEDATX\_\-5\_\-REG}~UEDATX
\item 
\#define {\bf UEDATX\_\-6\_\-REG}~UEDATX
\item 
\#define {\bf UEDATX\_\-7\_\-REG}~UEDATX
\item 
\#define {\bf ISC00\_\-REG}~EICRA
\item 
\#define {\bf ISC01\_\-REG}~EICRA
\item 
\#define {\bf ISC10\_\-REG}~EICRA
\item 
\#define {\bf ISC11\_\-REG}~EICRA
\item 
\#define {\bf ISC20\_\-REG}~EICRA
\item 
\#define {\bf ISC21\_\-REG}~EICRA
\item 
\#define {\bf ISC30\_\-REG}~EICRA
\item 
\#define {\bf ISC31\_\-REG}~EICRA
\item 
\#define {\bf EPDIR\_\-REG}~UECFG0X
\item 
\#define {\bf EPTYPE0\_\-REG}~UECFG0X
\item 
\#define {\bf EPTYPE1\_\-REG}~UECFG0X
\item 
\#define {\bf ADC0D\_\-REG}~DIDR0
\item 
\#define {\bf ADC1D\_\-REG}~DIDR0
\item 
\#define {\bf ADC2D\_\-REG}~DIDR0
\item 
\#define {\bf ADC3D\_\-REG}~DIDR0
\item 
\#define {\bf ADC4D\_\-REG}~DIDR0
\item 
\#define {\bf ADC5D\_\-REG}~DIDR0
\item 
\#define {\bf ADC6D\_\-REG}~DIDR0
\item 
\#define {\bf ADC7D\_\-REG}~DIDR0
\item 
\#define {\bf AIN0D\_\-REG}~DIDR1
\item 
\#define {\bf AIN1D\_\-REG}~DIDR1
\item 
\#define {\bf DDF0\_\-REG}~DDRF
\item 
\#define {\bf DDF1\_\-REG}~DDRF
\item 
\#define {\bf DDF2\_\-REG}~DDRF
\item 
\#define {\bf DDF3\_\-REG}~DDRF
\item 
\#define {\bf DDF4\_\-REG}~DDRF
\item 
\#define {\bf DDF5\_\-REG}~DDRF
\item 
\#define {\bf DDF6\_\-REG}~DDRF
\item 
\#define {\bf DDF7\_\-REG}~DDRF
\item 
\#define {\bf TCR2BUB\_\-REG}~ASSR
\item 
\#define {\bf TCR2AUB\_\-REG}~ASSR
\item 
\#define {\bf OCR2BUB\_\-REG}~ASSR
\item 
\#define {\bf OCR2AUB\_\-REG}~ASSR
\item 
\#define {\bf TCN2UB\_\-REG}~ASSR
\item 
\#define {\bf AS2\_\-REG}~ASSR
\item 
\#define {\bf EXCLK\_\-REG}~ASSR
\item 
\#define {\bf CLKPS0\_\-REG}~CLKPR
\item 
\#define {\bf CLKPS1\_\-REG}~CLKPR
\item 
\#define {\bf CLKPS2\_\-REG}~CLKPR
\item 
\#define {\bf CLKPS3\_\-REG}~CLKPR
\item 
\#define {\bf CLKPCE\_\-REG}~CLKPR
\item 
\#define {\bf C\_\-REG}~SREG
\item 
\#define {\bf Z\_\-REG}~SREG
\item 
\#define {\bf N\_\-REG}~SREG
\item 
\#define {\bf V\_\-REG}~SREG
\item 
\#define {\bf S\_\-REG}~SREG
\item 
\#define {\bf H\_\-REG}~SREG
\item 
\#define {\bf T\_\-REG}~SREG
\item 
\#define {\bf I\_\-REG}~SREG
\item 
\#define {\bf UENUM\_\-0\_\-REG}~UENUM
\item 
\#define {\bf UENUM\_\-1\_\-REG}~UENUM
\item 
\#define {\bf UENUM\_\-2\_\-REG}~UENUM
\item 
\#define {\bf UBRR\_\-0\_\-REG}~UBRR1L
\item 
\#define {\bf UBRR\_\-1\_\-REG}~UBRR1L
\item 
\#define {\bf UBRR\_\-2\_\-REG}~UBRR1L
\item 
\#define {\bf UBRR\_\-3\_\-REG}~UBRR1L
\item 
\#define {\bf UBRR\_\-4\_\-REG}~UBRR1L
\item 
\#define {\bf UBRR\_\-5\_\-REG}~UBRR1L
\item 
\#define {\bf UBRR\_\-6\_\-REG}~UBRR1L
\item 
\#define {\bf UBRR\_\-7\_\-REG}~UBRR1L
\item 
\#define {\bf DDC0\_\-REG}~DDRC
\item 
\#define {\bf DDC1\_\-REG}~DDRC
\item 
\#define {\bf DDC2\_\-REG}~DDRC
\item 
\#define {\bf DDC3\_\-REG}~DDRC
\item 
\#define {\bf DDC4\_\-REG}~DDRC
\item 
\#define {\bf DDC5\_\-REG}~DDRC
\item 
\#define {\bf DDC6\_\-REG}~DDRC
\item 
\#define {\bf DDC7\_\-REG}~DDRC
\item 
\#define {\bf OCR3AL0\_\-REG}~OCR3AL
\item 
\#define {\bf OCR3AL1\_\-REG}~OCR3AL
\item 
\#define {\bf OCR3AL2\_\-REG}~OCR3AL
\item 
\#define {\bf OCR3AL3\_\-REG}~OCR3AL
\item 
\#define {\bf OCR3AL4\_\-REG}~OCR3AL
\item 
\#define {\bf OCR3AL5\_\-REG}~OCR3AL
\item 
\#define {\bf OCR3AL6\_\-REG}~OCR3AL
\item 
\#define {\bf OCR3AL7\_\-REG}~OCR3AL
\item 
\#define {\bf DDA0\_\-REG}~DDRA
\item 
\#define {\bf DDA1\_\-REG}~DDRA
\item 
\#define {\bf DDA2\_\-REG}~DDRA
\item 
\#define {\bf DDA3\_\-REG}~DDRA
\item 
\#define {\bf DDA4\_\-REG}~DDRA
\item 
\#define {\bf DDA5\_\-REG}~DDRA
\item 
\#define {\bf DDA6\_\-REG}~DDRA
\item 
\#define {\bf DDA7\_\-REG}~DDRA
\item 
\#define {\bf WGM10\_\-REG}~TCCR1A
\item 
\#define {\bf WGM11\_\-REG}~TCCR1A
\item 
\#define {\bf COM1C0\_\-REG}~TCCR1A
\item 
\#define {\bf COM1C1\_\-REG}~TCCR1A
\item 
\#define {\bf COM1B0\_\-REG}~TCCR1A
\item 
\#define {\bf COM1B1\_\-REG}~TCCR1A
\item 
\#define {\bf COM1A0\_\-REG}~TCCR1A
\item 
\#define {\bf COM1A1\_\-REG}~TCCR1A
\item 
\#define {\bf OCR3AH0\_\-REG}~OCR3AH
\item 
\#define {\bf OCR3AH1\_\-REG}~OCR3AH
\item 
\#define {\bf OCR3AH2\_\-REG}~OCR3AH
\item 
\#define {\bf OCR3AH3\_\-REG}~OCR3AH
\item 
\#define {\bf OCR3AH4\_\-REG}~OCR3AH
\item 
\#define {\bf OCR3AH5\_\-REG}~OCR3AH
\item 
\#define {\bf OCR3AH6\_\-REG}~OCR3AH
\item 
\#define {\bf OCR3AH7\_\-REG}~OCR3AH
\item 
\#define {\bf CS10\_\-REG}~TCCR1B
\item 
\#define {\bf CS11\_\-REG}~TCCR1B
\item 
\#define {\bf CS12\_\-REG}~TCCR1B
\item 
\#define {\bf WGM12\_\-REG}~TCCR1B
\item 
\#define {\bf WGM13\_\-REG}~TCCR1B
\item 
\#define {\bf ICES1\_\-REG}~TCCR1B
\item 
\#define {\bf ICNC1\_\-REG}~TCCR1B
\item 
\#define {\bf CAL0\_\-REG}~OSCCAL
\item 
\#define {\bf CAL1\_\-REG}~OSCCAL
\item 
\#define {\bf CAL2\_\-REG}~OSCCAL
\item 
\#define {\bf CAL3\_\-REG}~OSCCAL
\item 
\#define {\bf CAL4\_\-REG}~OSCCAL
\item 
\#define {\bf CAL5\_\-REG}~OSCCAL
\item 
\#define {\bf CAL6\_\-REG}~OSCCAL
\item 
\#define {\bf CAL7\_\-REG}~OSCCAL
\item 
\#define {\bf DDD0\_\-REG}~DDRD
\item 
\#define {\bf DDD1\_\-REG}~DDRD
\item 
\#define {\bf DDD2\_\-REG}~DDRD
\item 
\#define {\bf DDD3\_\-REG}~DDRD
\item 
\#define {\bf DDD4\_\-REG}~DDRD
\item 
\#define {\bf DDD5\_\-REG}~DDRD
\item 
\#define {\bf DDD6\_\-REG}~DDRD
\item 
\#define {\bf DDD7\_\-REG}~DDRD
\item 
\#define {\bf GPIOR10\_\-REG}~GPIOR1
\item 
\#define {\bf GPIOR11\_\-REG}~GPIOR1
\item 
\#define {\bf GPIOR12\_\-REG}~GPIOR1
\item 
\#define {\bf GPIOR13\_\-REG}~GPIOR1
\item 
\#define {\bf GPIOR14\_\-REG}~GPIOR1
\item 
\#define {\bf GPIOR15\_\-REG}~GPIOR1
\item 
\#define {\bf GPIOR16\_\-REG}~GPIOR1
\item 
\#define {\bf GPIOR17\_\-REG}~GPIOR1
\item 
\#define {\bf GPIOR00\_\-REG}~GPIOR0
\item 
\#define {\bf GPIOR01\_\-REG}~GPIOR0
\item 
\#define {\bf GPIOR02\_\-REG}~GPIOR0
\item 
\#define {\bf GPIOR03\_\-REG}~GPIOR0
\item 
\#define {\bf GPIOR04\_\-REG}~GPIOR0
\item 
\#define {\bf GPIOR05\_\-REG}~GPIOR0
\item 
\#define {\bf GPIOR06\_\-REG}~GPIOR0
\item 
\#define {\bf GPIOR07\_\-REG}~GPIOR0
\item 
\#define {\bf GPIOR20\_\-REG}~GPIOR2
\item 
\#define {\bf GPIOR21\_\-REG}~GPIOR2
\item 
\#define {\bf GPIOR22\_\-REG}~GPIOR2
\item 
\#define {\bf GPIOR23\_\-REG}~GPIOR2
\item 
\#define {\bf GPIOR24\_\-REG}~GPIOR2
\item 
\#define {\bf GPIOR25\_\-REG}~GPIOR2
\item 
\#define {\bf GPIOR26\_\-REG}~GPIOR2
\item 
\#define {\bf GPIOR27\_\-REG}~GPIOR2
\item 
\#define {\bf DETACH\_\-REG}~UDCON
\item 
\#define {\bf RMWKUP\_\-REG}~UDCON
\item 
\#define {\bf LSM\_\-REG}~UDCON
\item 
\#define {\bf PCIE0\_\-REG}~PCICR
\item 
\#define {\bf VBUSTI\_\-REG}~USBINT
\item 
\#define {\bf IDTI\_\-REG}~USBINT
\item 
\#define {\bf TCNT2\_\-0\_\-REG}~TCNT2
\item 
\#define {\bf TCNT2\_\-1\_\-REG}~TCNT2
\item 
\#define {\bf TCNT2\_\-2\_\-REG}~TCNT2
\item 
\#define {\bf TCNT2\_\-3\_\-REG}~TCNT2
\item 
\#define {\bf TCNT2\_\-4\_\-REG}~TCNT2
\item 
\#define {\bf TCNT2\_\-5\_\-REG}~TCNT2
\item 
\#define {\bf TCNT2\_\-6\_\-REG}~TCNT2
\item 
\#define {\bf TCNT2\_\-7\_\-REG}~TCNT2
\item 
\#define {\bf TCNT0\_\-0\_\-REG}~TCNT0
\item 
\#define {\bf TCNT0\_\-1\_\-REG}~TCNT0
\item 
\#define {\bf TCNT0\_\-2\_\-REG}~TCNT0
\item 
\#define {\bf TCNT0\_\-3\_\-REG}~TCNT0
\item 
\#define {\bf TCNT0\_\-4\_\-REG}~TCNT0
\item 
\#define {\bf TCNT0\_\-5\_\-REG}~TCNT0
\item 
\#define {\bf TCNT0\_\-6\_\-REG}~TCNT0
\item 
\#define {\bf TCNT0\_\-7\_\-REG}~TCNT0
\item 
\#define {\bf TWGCE\_\-REG}~TWAR
\item 
\#define {\bf TWA0\_\-REG}~TWAR
\item 
\#define {\bf TWA1\_\-REG}~TWAR
\item 
\#define {\bf TWA2\_\-REG}~TWAR
\item 
\#define {\bf TWA3\_\-REG}~TWAR
\item 
\#define {\bf TWA4\_\-REG}~TWAR
\item 
\#define {\bf TWA5\_\-REG}~TWAR
\item 
\#define {\bf TWA6\_\-REG}~TWAR
\item 
\#define {\bf UVREGE\_\-REG}~UHWCON
\item 
\#define {\bf UVCONE\_\-REG}~UHWCON
\item 
\#define {\bf UIDE\_\-REG}~UHWCON
\item 
\#define {\bf UIMOD\_\-REG}~UHWCON
\item 
\#define {\bf CS00\_\-REG}~TCCR0B
\item 
\#define {\bf CS01\_\-REG}~TCCR0B
\item 
\#define {\bf CS02\_\-REG}~TCCR0B
\item 
\#define {\bf WGM02\_\-REG}~TCCR0B
\item 
\#define {\bf FOC0B\_\-REG}~TCCR0B
\item 
\#define {\bf FOC0A\_\-REG}~TCCR0B
\item 
\#define {\bf FNCERR\_\-REG}~UDMFN
\item 
\#define {\bf WGM00\_\-REG}~TCCR0A
\item 
\#define {\bf WGM01\_\-REG}~TCCR0A
\item 
\#define {\bf COM0B0\_\-REG}~TCCR0A
\item 
\#define {\bf COM0B1\_\-REG}~TCCR0A
\item 
\#define {\bf COM0A0\_\-REG}~TCCR0A
\item 
\#define {\bf COM0A1\_\-REG}~TCCR0A
\item 
\#define {\bf TOV2\_\-REG}~TIFR2
\item 
\#define {\bf OCF2A\_\-REG}~TIFR2
\item 
\#define {\bf OCF2B\_\-REG}~TIFR2
\item 
\#define {\bf TOV3\_\-REG}~TIFR3
\item 
\#define {\bf OCF3A\_\-REG}~TIFR3
\item 
\#define {\bf OCF3B\_\-REG}~TIFR3
\item 
\#define {\bf OCF3C\_\-REG}~TIFR3
\item 
\#define {\bf ICF3\_\-REG}~TIFR3
\item 
\#define {\bf SPR0\_\-REG}~SPCR
\item 
\#define {\bf SPR1\_\-REG}~SPCR
\item 
\#define {\bf CPHA\_\-REG}~SPCR
\item 
\#define {\bf CPOL\_\-REG}~SPCR
\item 
\#define {\bf MSTR\_\-REG}~SPCR
\item 
\#define {\bf DORD\_\-REG}~SPCR
\item 
\#define {\bf SPE\_\-REG}~SPCR
\item 
\#define {\bf SPIE\_\-REG}~SPCR
\item 
\#define {\bf TOV1\_\-REG}~TIFR1
\item 
\#define {\bf OCF1A\_\-REG}~TIFR1
\item 
\#define {\bf OCF1B\_\-REG}~TIFR1
\item 
\#define {\bf OCF1C\_\-REG}~TIFR1
\item 
\#define {\bf ICF1\_\-REG}~TIFR1
\item 
\#define {\bf EEAR8\_\-REG}~EEARH
\item 
\#define {\bf EEAR9\_\-REG}~EEARH
\item 
\#define {\bf EEAR10\_\-REG}~EEARH
\item 
\#define {\bf EEAR11\_\-REG}~EEARH
\item 
\#define {\bf UEBCLX\_\-0\_\-REG}~UEBCLX
\item 
\#define {\bf UEBCLX\_\-1\_\-REG}~UEBCLX
\item 
\#define {\bf UEBCLX\_\-2\_\-REG}~UEBCLX
\item 
\#define {\bf UEBCLX\_\-3\_\-REG}~UEBCLX
\item 
\#define {\bf UEBCLX\_\-4\_\-REG}~UEBCLX
\item 
\#define {\bf UEBCLX\_\-5\_\-REG}~UEBCLX
\item 
\#define {\bf UEBCLX\_\-6\_\-REG}~UEBCLX
\item 
\#define {\bf UEBCLX\_\-7\_\-REG}~UEBCLX
\item 
\#define {\bf OCR3CH0\_\-REG}~OCR3CH
\item 
\#define {\bf OCR3CH1\_\-REG}~OCR3CH
\item 
\#define {\bf OCR3CH2\_\-REG}~OCR3CH
\item 
\#define {\bf OCR3CH3\_\-REG}~OCR3CH
\item 
\#define {\bf OCR3CH4\_\-REG}~OCR3CH
\item 
\#define {\bf OCR3CH5\_\-REG}~OCR3CH
\item 
\#define {\bf OCR3CH6\_\-REG}~OCR3CH
\item 
\#define {\bf OCR3CH7\_\-REG}~OCR3CH
\item 
\#define {\bf CURRBK0\_\-REG}~UESTA1X
\item 
\#define {\bf CURRBK1\_\-REG}~UESTA1X
\item 
\#define {\bf CTRLDIR\_\-REG}~UESTA1X
\item 
\#define {\bf OCR3CL0\_\-REG}~OCR3CL
\item 
\#define {\bf OCR3CL1\_\-REG}~OCR3CL
\item 
\#define {\bf OCR3CL2\_\-REG}~OCR3CL
\item 
\#define {\bf OCR3CL3\_\-REG}~OCR3CL
\item 
\#define {\bf OCR3CL4\_\-REG}~OCR3CL
\item 
\#define {\bf OCR3CL5\_\-REG}~OCR3CL
\item 
\#define {\bf OCR3CL6\_\-REG}~OCR3CL
\item 
\#define {\bf OCR3CL7\_\-REG}~OCR3CL
\item 
\#define {\bf PSRSYNC\_\-REG}~GTCCR
\item 
\#define {\bf TSM\_\-REG}~GTCCR
\item 
\#define {\bf PSRASY\_\-REG}~GTCCR
\item 
\#define {\bf TWBR0\_\-REG}~TWBR
\item 
\#define {\bf TWBR1\_\-REG}~TWBR
\item 
\#define {\bf TWBR2\_\-REG}~TWBR
\item 
\#define {\bf TWBR3\_\-REG}~TWBR
\item 
\#define {\bf TWBR4\_\-REG}~TWBR
\item 
\#define {\bf TWBR5\_\-REG}~TWBR
\item 
\#define {\bf TWBR6\_\-REG}~TWBR
\item 
\#define {\bf TWBR7\_\-REG}~TWBR
\item 
\#define {\bf SP8\_\-REG}~SPH
\item 
\#define {\bf SP9\_\-REG}~SPH
\item 
\#define {\bf SP10\_\-REG}~SPH
\item 
\#define {\bf SP11\_\-REG}~SPH
\item 
\#define {\bf SP12\_\-REG}~SPH
\item 
\#define {\bf SP13\_\-REG}~SPH
\item 
\#define {\bf SP14\_\-REG}~SPH
\item 
\#define {\bf SP15\_\-REG}~SPH
\item 
\#define {\bf FOC3C\_\-REG}~TCCR3C
\item 
\#define {\bf FOC3B\_\-REG}~TCCR3C
\item 
\#define {\bf FOC3A\_\-REG}~TCCR3C
\item 
\#define {\bf CS30\_\-REG}~TCCR3B
\item 
\#define {\bf CS31\_\-REG}~TCCR3B
\item 
\#define {\bf CS32\_\-REG}~TCCR3B
\item 
\#define {\bf WGM32\_\-REG}~TCCR3B
\item 
\#define {\bf WGM33\_\-REG}~TCCR3B
\item 
\#define {\bf ICES3\_\-REG}~TCCR3B
\item 
\#define {\bf ICNC3\_\-REG}~TCCR3B
\item 
\#define {\bf WGM30\_\-REG}~TCCR3A
\item 
\#define {\bf WGM31\_\-REG}~TCCR3A
\item 
\#define {\bf COM3C0\_\-REG}~TCCR3A
\item 
\#define {\bf COM3C1\_\-REG}~TCCR3A
\item 
\#define {\bf COM3B0\_\-REG}~TCCR3A
\item 
\#define {\bf COM3B1\_\-REG}~TCCR3A
\item 
\#define {\bf COM3A0\_\-REG}~TCCR3A
\item 
\#define {\bf COM3A1\_\-REG}~TCCR3A
\item 
\#define {\bf TXINI\_\-REG}~UEINTX
\item 
\#define {\bf STALLEDI\_\-REG}~UEINTX
\item 
\#define {\bf RXOUTI\_\-REG}~UEINTX
\item 
\#define {\bf RXSTPI\_\-REG}~UEINTX
\item 
\#define {\bf NAKOUTI\_\-REG}~UEINTX
\item 
\#define {\bf RWAL\_\-REG}~UEINTX
\item 
\#define {\bf NAKINI\_\-REG}~UEINTX
\item 
\#define {\bf FIFOCON\_\-REG}~UEINTX
\item 
\#define {\bf OCR1BL0\_\-REG}~OCR1BL
\item 
\#define {\bf OCR1BL1\_\-REG}~OCR1BL
\item 
\#define {\bf OCR1BL2\_\-REG}~OCR1BL
\item 
\#define {\bf OCR1BL3\_\-REG}~OCR1BL
\item 
\#define {\bf OCR1BL4\_\-REG}~OCR1BL
\item 
\#define {\bf OCR1BL5\_\-REG}~OCR1BL
\item 
\#define {\bf OCR1BL6\_\-REG}~OCR1BL
\item 
\#define {\bf OCR1BL7\_\-REG}~OCR1BL
\item 
\#define {\bf TCNT3H0\_\-REG}~TCNT3H
\item 
\#define {\bf TCNT3H1\_\-REG}~TCNT3H
\item 
\#define {\bf TCNT3H2\_\-REG}~TCNT3H
\item 
\#define {\bf TCNT3H3\_\-REG}~TCNT3H
\item 
\#define {\bf TCNT3H4\_\-REG}~TCNT3H
\item 
\#define {\bf TCNT3H5\_\-REG}~TCNT3H
\item 
\#define {\bf TCNT3H6\_\-REG}~TCNT3H
\item 
\#define {\bf TCNT3H7\_\-REG}~TCNT3H
\item 
\#define {\bf OCR1BH0\_\-REG}~OCR1BH
\item 
\#define {\bf OCR1BH1\_\-REG}~OCR1BH
\item 
\#define {\bf OCR1BH2\_\-REG}~OCR1BH
\item 
\#define {\bf OCR1BH3\_\-REG}~OCR1BH
\item 
\#define {\bf OCR1BH4\_\-REG}~OCR1BH
\item 
\#define {\bf OCR1BH5\_\-REG}~OCR1BH
\item 
\#define {\bf OCR1BH6\_\-REG}~OCR1BH
\item 
\#define {\bf OCR1BH7\_\-REG}~OCR1BH
\item 
\#define {\bf TCNT3L0\_\-REG}~TCNT3L
\item 
\#define {\bf TCNT3L1\_\-REG}~TCNT3L
\item 
\#define {\bf TCNT3L2\_\-REG}~TCNT3L
\item 
\#define {\bf TCNT3L3\_\-REG}~TCNT3L
\item 
\#define {\bf TCNT3L4\_\-REG}~TCNT3L
\item 
\#define {\bf TCNT3L5\_\-REG}~TCNT3L
\item 
\#define {\bf TCNT3L6\_\-REG}~TCNT3L
\item 
\#define {\bf TCNT3L7\_\-REG}~TCNT3L
\item 
\#define {\bf SP0\_\-REG}~SPL
\item 
\#define {\bf SP1\_\-REG}~SPL
\item 
\#define {\bf SP2\_\-REG}~SPL
\item 
\#define {\bf SP3\_\-REG}~SPL
\item 
\#define {\bf SP4\_\-REG}~SPL
\item 
\#define {\bf SP5\_\-REG}~SPL
\item 
\#define {\bf SP6\_\-REG}~SPL
\item 
\#define {\bf SP7\_\-REG}~SPL
\item 
\#define {\bf VBUSTE\_\-REG}~USBCON
\item 
\#define {\bf IDTE\_\-REG}~USBCON
\item 
\#define {\bf OTGPADE\_\-REG}~USBCON
\item 
\#define {\bf FRZCLK\_\-REG}~USBCON
\item 
\#define {\bf HOST\_\-REG}~USBCON
\item 
\#define {\bf USBE\_\-REG}~USBCON
\item 
\#define {\bf JTRF\_\-REG}~MCUSR
\item 
\#define {\bf PORF\_\-REG}~MCUSR
\item 
\#define {\bf EXTRF\_\-REG}~MCUSR
\item 
\#define {\bf BORF\_\-REG}~MCUSR
\item 
\#define {\bf WDRF\_\-REG}~MCUSR
\item 
\#define {\bf EERE\_\-REG}~EECR
\item 
\#define {\bf EEPE\_\-REG}~EECR
\item 
\#define {\bf EEMPE\_\-REG}~EECR
\item 
\#define {\bf EERIE\_\-REG}~EECR
\item 
\#define {\bf EEPM0\_\-REG}~EECR
\item 
\#define {\bf EEPM1\_\-REG}~EECR
\item 
\#define {\bf SE\_\-REG}~SMCR
\item 
\#define {\bf SM0\_\-REG}~SMCR
\item 
\#define {\bf SM1\_\-REG}~SMCR
\item 
\#define {\bf SM2\_\-REG}~SMCR
\item 
\#define {\bf TWIE\_\-REG}~TWCR
\item 
\#define {\bf TWEN\_\-REG}~TWCR
\item 
\#define {\bf TWWC\_\-REG}~TWCR
\item 
\#define {\bf TWSTO\_\-REG}~TWCR
\item 
\#define {\bf TWSTA\_\-REG}~TWCR
\item 
\#define {\bf TWEA\_\-REG}~TWCR
\item 
\#define {\bf TWINT\_\-REG}~TWCR
\item 
\#define {\bf PCIF0\_\-REG}~PCIFR
\item 
\#define {\bf WGM20\_\-REG}~TCCR2A
\item 
\#define {\bf WGM21\_\-REG}~TCCR2A
\item 
\#define {\bf COM2B0\_\-REG}~TCCR2A
\item 
\#define {\bf COM2B1\_\-REG}~TCCR2A
\item 
\#define {\bf COM2A0\_\-REG}~TCCR2A
\item 
\#define {\bf COM2A1\_\-REG}~TCCR2A
\item 
\#define {\bf CS20\_\-REG}~TCCR2B
\item 
\#define {\bf CS21\_\-REG}~TCCR2B
\item 
\#define {\bf CS22\_\-REG}~TCCR2B
\item 
\#define {\bf WGM22\_\-REG}~TCCR2B
\item 
\#define {\bf FOC2B\_\-REG}~TCCR2B
\item 
\#define {\bf FOC2A\_\-REG}~TCCR2B
\item 
\#define {\bf EPEN\_\-REG}~UECONX
\item 
\#define {\bf RSTDT\_\-REG}~UECONX
\item 
\#define {\bf STALLRQC\_\-REG}~UECONX
\item 
\#define {\bf STALLRQ\_\-REG}~UECONX
\item 
\#define {\bf TWPS0\_\-REG}~TWSR
\item 
\#define {\bf TWPS1\_\-REG}~TWSR
\item 
\#define {\bf TWS3\_\-REG}~TWSR
\item 
\#define {\bf TWS4\_\-REG}~TWSR
\item 
\#define {\bf TWS5\_\-REG}~TWSR
\item 
\#define {\bf TWS6\_\-REG}~TWSR
\item 
\#define {\bf TWS7\_\-REG}~TWSR
\item 
\#define {\bf EEAR0\_\-REG}~EEARL
\item 
\#define {\bf EEAR1\_\-REG}~EEARL
\item 
\#define {\bf EEAR2\_\-REG}~EEARL
\item 
\#define {\bf EEAR3\_\-REG}~EEARL
\item 
\#define {\bf EEAR4\_\-REG}~EEARL
\item 
\#define {\bf EEAR5\_\-REG}~EEARL
\item 
\#define {\bf EEAR6\_\-REG}~EEARL
\item 
\#define {\bf EEAR7\_\-REG}~EEARL
\item 
\#define {\bf JTD\_\-REG}~MCUCR
\item 
\#define {\bf IVCE\_\-REG}~MCUCR
\item 
\#define {\bf IVSEL\_\-REG}~MCUCR
\item 
\#define {\bf PUD\_\-REG}~MCUCR
\item 
\#define {\bf OCR1CL0\_\-REG}~OCR1CL
\item 
\#define {\bf OCR1CL1\_\-REG}~OCR1CL
\item 
\#define {\bf OCR1CL2\_\-REG}~OCR1CL
\item 
\#define {\bf OCR1CL3\_\-REG}~OCR1CL
\item 
\#define {\bf OCR1CL4\_\-REG}~OCR1CL
\item 
\#define {\bf OCR1CL5\_\-REG}~OCR1CL
\item 
\#define {\bf OCR1CL6\_\-REG}~OCR1CL
\item 
\#define {\bf OCR1CL7\_\-REG}~OCR1CL
\item 
\#define {\bf OCR1CH0\_\-REG}~OCR1CH
\item 
\#define {\bf OCR1CH1\_\-REG}~OCR1CH
\item 
\#define {\bf OCR1CH2\_\-REG}~OCR1CH
\item 
\#define {\bf OCR1CH3\_\-REG}~OCR1CH
\item 
\#define {\bf OCR1CH4\_\-REG}~OCR1CH
\item 
\#define {\bf OCR1CH5\_\-REG}~OCR1CH
\item 
\#define {\bf OCR1CH6\_\-REG}~OCR1CH
\item 
\#define {\bf OCR1CH7\_\-REG}~OCR1CH
\item 
\#define {\bf OCDR0\_\-REG}~OCDR
\item 
\#define {\bf OCDR1\_\-REG}~OCDR
\item 
\#define {\bf OCDR2\_\-REG}~OCDR
\item 
\#define {\bf OCDR3\_\-REG}~OCDR
\item 
\#define {\bf OCDR4\_\-REG}~OCDR
\item 
\#define {\bf OCDR5\_\-REG}~OCDR
\item 
\#define {\bf OCDR6\_\-REG}~OCDR
\item 
\#define {\bf OCDR7\_\-REG}~OCDR
\item 
\#define {\bf PINA0\_\-REG}~PINA
\item 
\#define {\bf PINA1\_\-REG}~PINA
\item 
\#define {\bf PINA2\_\-REG}~PINA
\item 
\#define {\bf PINA3\_\-REG}~PINA
\item 
\#define {\bf PINA4\_\-REG}~PINA
\item 
\#define {\bf PINA5\_\-REG}~PINA
\item 
\#define {\bf PINA6\_\-REG}~PINA
\item 
\#define {\bf PINA7\_\-REG}~PINA
\item 
\#define {\bf VBUS\_\-REG}~USBSTA
\item 
\#define {\bf ID\_\-REG}~USBSTA
\item 
\#define {\bf SPEED\_\-REG}~USBSTA
\item 
\#define {\bf TXINE\_\-REG}~UEIENX
\item 
\#define {\bf STALLEDE\_\-REG}~UEIENX
\item 
\#define {\bf RXOUTE\_\-REG}~UEIENX
\item 
\#define {\bf RXSTPE\_\-REG}~UEIENX
\item 
\#define {\bf NAKOUTE\_\-REG}~UEIENX
\item 
\#define {\bf NAKINE\_\-REG}~UEIENX
\item 
\#define {\bf FLERRE\_\-REG}~UEIENX
\item 
\#define {\bf TXB81\_\-REG}~UCSR1B
\item 
\#define {\bf RXB81\_\-REG}~UCSR1B
\item 
\#define {\bf UCSZ12\_\-REG}~UCSR1B
\item 
\#define {\bf TXEN1\_\-REG}~UCSR1B
\item 
\#define {\bf RXEN1\_\-REG}~UCSR1B
\item 
\#define {\bf UDRIE1\_\-REG}~UCSR1B
\item 
\#define {\bf TXCIE1\_\-REG}~UCSR1B
\item 
\#define {\bf RXCIE1\_\-REG}~UCSR1B
\item 
\#define {\bf UCPOL1\_\-REG}~UCSR1C
\item 
\#define {\bf UCSZ10\_\-REG}~UCSR1C
\item 
\#define {\bf UCSZ11\_\-REG}~UCSR1C
\item 
\#define {\bf USBS1\_\-REG}~UCSR1C
\item 
\#define {\bf UPM10\_\-REG}~UCSR1C
\item 
\#define {\bf UPM11\_\-REG}~UCSR1C
\item 
\#define {\bf UMSEL10\_\-REG}~UCSR1C
\item 
\#define {\bf UMSEL11\_\-REG}~UCSR1C
\item 
\#define {\bf MPCM1\_\-REG}~UCSR1A
\item 
\#define {\bf U2X1\_\-REG}~UCSR1A
\item 
\#define {\bf UPE1\_\-REG}~UCSR1A
\item 
\#define {\bf DOR1\_\-REG}~UCSR1A
\item 
\#define {\bf FE1\_\-REG}~UCSR1A
\item 
\#define {\bf UDRE1\_\-REG}~UCSR1A
\item 
\#define {\bf TXC1\_\-REG}~UCSR1A
\item 
\#define {\bf RXC1\_\-REG}~UCSR1A
\item 
\#define {\bf DDB0\_\-REG}~DDRB
\item 
\#define {\bf DDB1\_\-REG}~DDRB
\item 
\#define {\bf DDB2\_\-REG}~DDRB
\item 
\#define {\bf DDB3\_\-REG}~DDRB
\item 
\#define {\bf DDB4\_\-REG}~DDRB
\item 
\#define {\bf DDB5\_\-REG}~DDRB
\item 
\#define {\bf DDB6\_\-REG}~DDRB
\item 
\#define {\bf DDB7\_\-REG}~DDRB
\item 
\#define {\bf UDFNUML\_\-0\_\-REG}~UDFNUML
\item 
\#define {\bf UDFNUML\_\-1\_\-REG}~UDFNUML
\item 
\#define {\bf UDFNUML\_\-2\_\-REG}~UDFNUML
\item 
\#define {\bf UDFNUML\_\-3\_\-REG}~UDFNUML
\item 
\#define {\bf UDFNUML\_\-4\_\-REG}~UDFNUML
\item 
\#define {\bf UDFNUML\_\-5\_\-REG}~UDFNUML
\item 
\#define {\bf UDFNUML\_\-6\_\-REG}~UDFNUML
\item 
\#define {\bf UDFNUML\_\-7\_\-REG}~UDFNUML
\item 
\#define {\bf TWD0\_\-REG}~TWDR
\item 
\#define {\bf TWD1\_\-REG}~TWDR
\item 
\#define {\bf TWD2\_\-REG}~TWDR
\item 
\#define {\bf TWD3\_\-REG}~TWDR
\item 
\#define {\bf TWD4\_\-REG}~TWDR
\item 
\#define {\bf TWD5\_\-REG}~TWDR
\item 
\#define {\bf TWD6\_\-REG}~TWDR
\item 
\#define {\bf TWD7\_\-REG}~TWDR
\item 
\#define {\bf UDFNUMH\_\-0\_\-REG}~UDFNUMH
\item 
\#define {\bf UDFNUMH\_\-1\_\-REG}~UDFNUMH
\item 
\#define {\bf UDFNUMH\_\-2\_\-REG}~UDFNUMH
\item 
\#define {\bf TWAM0\_\-REG}~TWAMR
\item 
\#define {\bf TWAM1\_\-REG}~TWAMR
\item 
\#define {\bf TWAM2\_\-REG}~TWAMR
\item 
\#define {\bf TWAM3\_\-REG}~TWAMR
\item 
\#define {\bf TWAM4\_\-REG}~TWAMR
\item 
\#define {\bf TWAM5\_\-REG}~TWAMR
\item 
\#define {\bf TWAM6\_\-REG}~TWAMR
\item 
\#define {\bf ADPS0\_\-REG}~ADCSRA
\item 
\#define {\bf ADPS1\_\-REG}~ADCSRA
\item 
\#define {\bf ADPS2\_\-REG}~ADCSRA
\item 
\#define {\bf ADIE\_\-REG}~ADCSRA
\item 
\#define {\bf ADIF\_\-REG}~ADCSRA
\item 
\#define {\bf ADATE\_\-REG}~ADCSRA
\item 
\#define {\bf ADSC\_\-REG}~ADCSRA
\item 
\#define {\bf ADEN\_\-REG}~ADCSRA
\item 
\#define {\bf ADTS0\_\-REG}~ADCSRB
\item 
\#define {\bf ADTS1\_\-REG}~ADCSRB
\item 
\#define {\bf ADTS2\_\-REG}~ADCSRB
\item 
\#define {\bf ADHSM\_\-REG}~ADCSRB
\item 
\#define {\bf ACME\_\-REG}~ADCSRB
\item 
\#define {\bf PRADC\_\-REG}~PRR0
\item 
\#define {\bf PRSPI\_\-REG}~PRR0
\item 
\#define {\bf PRTIM1\_\-REG}~PRR0
\item 
\#define {\bf PRTIM0\_\-REG}~PRR0
\item 
\#define {\bf PRTIM2\_\-REG}~PRR0
\item 
\#define {\bf PRTWI\_\-REG}~PRR0
\item 
\#define {\bf UBRR\_\-8\_\-REG}~UBRR1H
\item 
\#define {\bf UBRR\_\-9\_\-REG}~UBRR1H
\item 
\#define {\bf UBRR\_\-10\_\-REG}~UBRR1H
\item 
\#define {\bf UBRR\_\-11\_\-REG}~UBRR1H
\item 
\#define {\bf OCROA\_\-0\_\-REG}~OCR0A
\item 
\#define {\bf OCROA\_\-1\_\-REG}~OCR0A
\item 
\#define {\bf OCROA\_\-2\_\-REG}~OCR0A
\item 
\#define {\bf OCROA\_\-3\_\-REG}~OCR0A
\item 
\#define {\bf OCROA\_\-4\_\-REG}~OCR0A
\item 
\#define {\bf OCROA\_\-5\_\-REG}~OCR0A
\item 
\#define {\bf OCROA\_\-6\_\-REG}~OCR0A
\item 
\#define {\bf OCROA\_\-7\_\-REG}~OCR0A
\item 
\#define {\bf ACIS0\_\-REG}~ACSR
\item 
\#define {\bf ACIS1\_\-REG}~ACSR
\item 
\#define {\bf ACIC\_\-REG}~ACSR
\item 
\#define {\bf ACIE\_\-REG}~ACSR
\item 
\#define {\bf ACI\_\-REG}~ACSR
\item 
\#define {\bf ACO\_\-REG}~ACSR
\item 
\#define {\bf ACBG\_\-REG}~ACSR
\item 
\#define {\bf ACD\_\-REG}~ACSR
\item 
\#define {\bf PORTF0\_\-REG}~PORTF
\item 
\#define {\bf PORTF1\_\-REG}~PORTF
\item 
\#define {\bf PORTF2\_\-REG}~PORTF
\item 
\#define {\bf PORTF3\_\-REG}~PORTF
\item 
\#define {\bf PORTF4\_\-REG}~PORTF
\item 
\#define {\bf PORTF5\_\-REG}~PORTF
\item 
\#define {\bf PORTF6\_\-REG}~PORTF
\item 
\#define {\bf PORTF7\_\-REG}~PORTF
\item 
\#define {\bf FOC1C\_\-REG}~TCCR1C
\item 
\#define {\bf FOC1B\_\-REG}~TCCR1C
\item 
\#define {\bf FOC1A\_\-REG}~TCCR1C
\item 
\#define {\bf ICR3H0\_\-REG}~ICR3H
\item 
\#define {\bf ICR3H1\_\-REG}~ICR3H
\item 
\#define {\bf ICR3H2\_\-REG}~ICR3H
\item 
\#define {\bf ICR3H3\_\-REG}~ICR3H
\item 
\#define {\bf ICR3H4\_\-REG}~ICR3H
\item 
\#define {\bf ICR3H5\_\-REG}~ICR3H
\item 
\#define {\bf ICR3H6\_\-REG}~ICR3H
\item 
\#define {\bf ICR3H7\_\-REG}~ICR3H
\item 
\#define {\bf DDE0\_\-REG}~DDRE
\item 
\#define {\bf DDE1\_\-REG}~DDRE
\item 
\#define {\bf DDE2\_\-REG}~DDRE
\item 
\#define {\bf DDE3\_\-REG}~DDRE
\item 
\#define {\bf DDE4\_\-REG}~DDRE
\item 
\#define {\bf DDE5\_\-REG}~DDRE
\item 
\#define {\bf DDE6\_\-REG}~DDRE
\item 
\#define {\bf DDE7\_\-REG}~DDRE
\item 
\#define {\bf UADD0\_\-REG}~UDADDR
\item 
\#define {\bf UADD1\_\-REG}~UDADDR
\item 
\#define {\bf UADD2\_\-REG}~UDADDR
\item 
\#define {\bf UADD3\_\-REG}~UDADDR
\item 
\#define {\bf UADD4\_\-REG}~UDADDR
\item 
\#define {\bf UADD5\_\-REG}~UDADDR
\item 
\#define {\bf UADD6\_\-REG}~UDADDR
\item 
\#define {\bf ADDEN\_\-REG}~UDADDR
\item 
\#define {\bf ICR3L0\_\-REG}~ICR3L
\item 
\#define {\bf ICR3L1\_\-REG}~ICR3L
\item 
\#define {\bf ICR3L2\_\-REG}~ICR3L
\item 
\#define {\bf ICR3L3\_\-REG}~ICR3L
\item 
\#define {\bf ICR3L4\_\-REG}~ICR3L
\item 
\#define {\bf ICR3L5\_\-REG}~ICR3L
\item 
\#define {\bf ICR3L6\_\-REG}~ICR3L
\item 
\#define {\bf ICR3L7\_\-REG}~ICR3L
\item 
\#define {\bf SPMEN\_\-REG}~SPMCSR
\item 
\#define {\bf PGERS\_\-REG}~SPMCSR
\item 
\#define {\bf PGWRT\_\-REG}~SPMCSR
\item 
\#define {\bf BLBSET\_\-REG}~SPMCSR
\item 
\#define {\bf RWWSRE\_\-REG}~SPMCSR
\item 
\#define {\bf SIGRD\_\-REG}~SPMCSR
\item 
\#define {\bf RWWSB\_\-REG}~SPMCSR
\item 
\#define {\bf SPMIE\_\-REG}~SPMCSR
\item 
\#define {\bf NBUSYBK0\_\-REG}~UESTA0X
\item 
\#define {\bf NBUSYBK1\_\-REG}~UESTA0X
\item 
\#define {\bf DTSEQ0\_\-REG}~UESTA0X
\item 
\#define {\bf DTSEQ1\_\-REG}~UESTA0X
\item 
\#define {\bf UNDERFI\_\-REG}~UESTA0X
\item 
\#define {\bf OVERFI\_\-REG}~UESTA0X
\item 
\#define {\bf CFGOK\_\-REG}~UESTA0X
\item 
\#define {\bf PORTB0\_\-REG}~PORTB
\item 
\#define {\bf PORTB1\_\-REG}~PORTB
\item 
\#define {\bf PORTB2\_\-REG}~PORTB
\item 
\#define {\bf PORTB3\_\-REG}~PORTB
\item 
\#define {\bf PORTB4\_\-REG}~PORTB
\item 
\#define {\bf PORTB5\_\-REG}~PORTB
\item 
\#define {\bf PORTB6\_\-REG}~PORTB
\item 
\#define {\bf PORTB7\_\-REG}~PORTB
\item 
\#define {\bf ADCL0\_\-REG}~ADCL
\item 
\#define {\bf ADCL1\_\-REG}~ADCL
\item 
\#define {\bf ADCL2\_\-REG}~ADCL
\item 
\#define {\bf ADCL3\_\-REG}~ADCL
\item 
\#define {\bf ADCL4\_\-REG}~ADCL
\item 
\#define {\bf ADCL5\_\-REG}~ADCL
\item 
\#define {\bf ADCL6\_\-REG}~ADCL
\item 
\#define {\bf ADCL7\_\-REG}~ADCL
\item 
\#define {\bf ADCH0\_\-REG}~ADCH
\item 
\#define {\bf ADCH1\_\-REG}~ADCH
\item 
\#define {\bf ADCH2\_\-REG}~ADCH
\item 
\#define {\bf ADCH3\_\-REG}~ADCH
\item 
\#define {\bf ADCH4\_\-REG}~ADCH
\item 
\#define {\bf ADCH5\_\-REG}~ADCH
\item 
\#define {\bf ADCH6\_\-REG}~ADCH
\item 
\#define {\bf ADCH7\_\-REG}~ADCH
\item 
\#define {\bf OCR3BL0\_\-REG}~OCR3BL
\item 
\#define {\bf OCR3BL1\_\-REG}~OCR3BL
\item 
\#define {\bf OCR3BL2\_\-REG}~OCR3BL
\item 
\#define {\bf OCR3BL3\_\-REG}~OCR3BL
\item 
\#define {\bf OCR3BL4\_\-REG}~OCR3BL
\item 
\#define {\bf OCR3BL5\_\-REG}~OCR3BL
\item 
\#define {\bf OCR3BL6\_\-REG}~OCR3BL
\item 
\#define {\bf OCR3BL7\_\-REG}~OCR3BL
\item 
\#define {\bf OCR3BH0\_\-REG}~OCR3BH
\item 
\#define {\bf OCR3BH1\_\-REG}~OCR3BH
\item 
\#define {\bf OCR3BH2\_\-REG}~OCR3BH
\item 
\#define {\bf OCR3BH3\_\-REG}~OCR3BH
\item 
\#define {\bf OCR3BH4\_\-REG}~OCR3BH
\item 
\#define {\bf OCR3BH5\_\-REG}~OCR3BH
\item 
\#define {\bf OCR3BH6\_\-REG}~OCR3BH
\item 
\#define {\bf OCR3BH7\_\-REG}~OCR3BH
\item 
\#define {\bf TOIE2\_\-REG}~TIMSK2
\item 
\#define {\bf OCIE2A\_\-REG}~TIMSK2
\item 
\#define {\bf OCIE2B\_\-REG}~TIMSK2
\item 
\#define {\bf TOIE3\_\-REG}~TIMSK3
\item 
\#define {\bf OCIE3A\_\-REG}~TIMSK3
\item 
\#define {\bf OCIE3B\_\-REG}~TIMSK3
\item 
\#define {\bf OCIE3C\_\-REG}~TIMSK3
\item 
\#define {\bf ICIE3\_\-REG}~TIMSK3
\item 
\#define {\bf TOIE0\_\-REG}~TIMSK0
\item 
\#define {\bf OCIE0A\_\-REG}~TIMSK0
\item 
\#define {\bf OCIE0B\_\-REG}~TIMSK0
\item 
\#define {\bf TOIE1\_\-REG}~TIMSK1
\item 
\#define {\bf OCIE1A\_\-REG}~TIMSK1
\item 
\#define {\bf OCIE1B\_\-REG}~TIMSK1
\item 
\#define {\bf OCIE1C\_\-REG}~TIMSK1
\item 
\#define {\bf ICIE1\_\-REG}~TIMSK1
\item 
\#define {\bf PLOCK\_\-REG}~PLLCSR
\item 
\#define {\bf PLLE\_\-REG}~PLLCSR
\item 
\#define {\bf PLLP0\_\-REG}~PLLCSR
\item 
\#define {\bf PLLP1\_\-REG}~PLLCSR
\item 
\#define {\bf PLLP2\_\-REG}~PLLCSR
\item 
\#define {\bf PCINT0\_\-REG}~PCMSK0
\item 
\#define {\bf PCINT1\_\-REG}~PCMSK0
\item 
\#define {\bf PCINT2\_\-REG}~PCMSK0
\item 
\#define {\bf PCINT3\_\-REG}~PCMSK0
\item 
\#define {\bf PCINT4\_\-REG}~PCMSK0
\item 
\#define {\bf PCINT5\_\-REG}~PCMSK0
\item 
\#define {\bf PCINT6\_\-REG}~PCMSK0
\item 
\#define {\bf PCINT7\_\-REG}~PCMSK0
\item 
\#define {\bf XMM0\_\-REG}~XMCRB
\item 
\#define {\bf XMM1\_\-REG}~XMCRB
\item 
\#define {\bf XMM2\_\-REG}~XMCRB
\item 
\#define {\bf XMBK\_\-REG}~XMCRB
\item 
\#define {\bf SRW00\_\-REG}~XMCRA
\item 
\#define {\bf SRW01\_\-REG}~XMCRA
\item 
\#define {\bf SRW10\_\-REG}~XMCRA
\item 
\#define {\bf SRW11\_\-REG}~XMCRA
\item 
\#define {\bf SRL0\_\-REG}~XMCRA
\item 
\#define {\bf SRL1\_\-REG}~XMCRA
\item 
\#define {\bf SRL2\_\-REG}~XMCRA
\item 
\#define {\bf SRE\_\-REG}~XMCRA
\item 
\#define {\bf PINC0\_\-REG}~PINC
\item 
\#define {\bf PINC1\_\-REG}~PINC
\item 
\#define {\bf PINC2\_\-REG}~PINC
\item 
\#define {\bf PINC3\_\-REG}~PINC
\item 
\#define {\bf PINC4\_\-REG}~PINC
\item 
\#define {\bf PINC5\_\-REG}~PINC
\item 
\#define {\bf PINC6\_\-REG}~PINC
\item 
\#define {\bf PINC7\_\-REG}~PINC
\item 
\#define {\bf PINB0\_\-REG}~PINB
\item 
\#define {\bf PINB1\_\-REG}~PINB
\item 
\#define {\bf PINB2\_\-REG}~PINB
\item 
\#define {\bf PINB3\_\-REG}~PINB
\item 
\#define {\bf PINB4\_\-REG}~PINB
\item 
\#define {\bf PINB5\_\-REG}~PINB
\item 
\#define {\bf PINB6\_\-REG}~PINB
\item 
\#define {\bf PINB7\_\-REG}~PINB
\item 
\#define {\bf INTF0\_\-REG}~EIFR
\item 
\#define {\bf INTF1\_\-REG}~EIFR
\item 
\#define {\bf INTF2\_\-REG}~EIFR
\item 
\#define {\bf INTF3\_\-REG}~EIFR
\item 
\#define {\bf INTF4\_\-REG}~EIFR
\item 
\#define {\bf INTF5\_\-REG}~EIFR
\item 
\#define {\bf INTF6\_\-REG}~EIFR
\item 
\#define {\bf INTF7\_\-REG}~EIFR
\item 
\#define {\bf PINF0\_\-REG}~PINF
\item 
\#define {\bf PINF1\_\-REG}~PINF
\item 
\#define {\bf PINF2\_\-REG}~PINF
\item 
\#define {\bf PINF3\_\-REG}~PINF
\item 
\#define {\bf PINF4\_\-REG}~PINF
\item 
\#define {\bf PINF5\_\-REG}~PINF
\item 
\#define {\bf PINF6\_\-REG}~PINF
\item 
\#define {\bf PINF7\_\-REG}~PINF
\item 
\#define {\bf PINE0\_\-REG}~PINE
\item 
\#define {\bf PINE1\_\-REG}~PINE
\item 
\#define {\bf PINE2\_\-REG}~PINE
\item 
\#define {\bf PINE3\_\-REG}~PINE
\item 
\#define {\bf PINE4\_\-REG}~PINE
\item 
\#define {\bf PINE5\_\-REG}~PINE
\item 
\#define {\bf PINE6\_\-REG}~PINE
\item 
\#define {\bf PINE7\_\-REG}~PINE
\item 
\#define {\bf PIND0\_\-REG}~PIND
\item 
\#define {\bf PIND1\_\-REG}~PIND
\item 
\#define {\bf PIND2\_\-REG}~PIND
\item 
\#define {\bf PIND3\_\-REG}~PIND
\item 
\#define {\bf PIND4\_\-REG}~PIND
\item 
\#define {\bf PIND5\_\-REG}~PIND
\item 
\#define {\bf PIND6\_\-REG}~PIND
\item 
\#define {\bf PIND7\_\-REG}~PIND
\item 
\#define {\bf OCR1AH0\_\-REG}~OCR1AH
\item 
\#define {\bf OCR1AH1\_\-REG}~OCR1AH
\item 
\#define {\bf OCR1AH2\_\-REG}~OCR1AH
\item 
\#define {\bf OCR1AH3\_\-REG}~OCR1AH
\item 
\#define {\bf OCR1AH4\_\-REG}~OCR1AH
\item 
\#define {\bf OCR1AH5\_\-REG}~OCR1AH
\item 
\#define {\bf OCR1AH6\_\-REG}~OCR1AH
\item 
\#define {\bf OCR1AH7\_\-REG}~OCR1AH
\item 
\#define {\bf OCR1AL0\_\-REG}~OCR1AL
\item 
\#define {\bf OCR1AL1\_\-REG}~OCR1AL
\item 
\#define {\bf OCR1AL2\_\-REG}~OCR1AL
\item 
\#define {\bf OCR1AL3\_\-REG}~OCR1AL
\item 
\#define {\bf OCR1AL4\_\-REG}~OCR1AL
\item 
\#define {\bf OCR1AL5\_\-REG}~OCR1AL
\item 
\#define {\bf OCR1AL6\_\-REG}~OCR1AL
\item 
\#define {\bf OCR1AL7\_\-REG}~OCR1AL
\item 
\#define {\bf TOV0\_\-REG}~TIFR0
\item 
\#define {\bf OCF0A\_\-REG}~TIFR0
\item 
\#define {\bf OCF0B\_\-REG}~TIFR0
\item 
\#define {\bf PRUSART1\_\-REG}~PRR1
\item 
\#define {\bf PRTIM3\_\-REG}~PRR1
\item 
\#define {\bf PRUSB\_\-REG}~PRR1
\end{CompactItemize}


\subsection{Define Documentation}
\index{ATmega32U6.h@{ATmega32U6.h}!ACBG\_\-REG@{ACBG\_\-REG}}
\index{ACBG\_\-REG@{ACBG\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ACBG\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ACBG\_\-REG~ACSR}\label{ATmega32U6_8h_cb77d1b728691981172b5a76911173d4}




Definition at line 1100 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ACD\_\-REG@{ACD\_\-REG}}
\index{ACD\_\-REG@{ACD\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ACD\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ACD\_\-REG~ACSR}\label{ATmega32U6_8h_0f37b9619466627af0fcf3ff7d9c91e2}




Definition at line 1101 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ACI\_\-REG@{ACI\_\-REG}}
\index{ACI\_\-REG@{ACI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ACI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ACI\_\-REG~ACSR}\label{ATmega32U6_8h_887ee410a1dfc1c5d9ec2bbdf1956f87}




Definition at line 1098 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ACIC\_\-REG@{ACIC\_\-REG}}
\index{ACIC\_\-REG@{ACIC\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ACIC\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ACIC\_\-REG~ACSR}\label{ATmega32U6_8h_e79a2dc9873057daf6302f4d3c74e913}




Definition at line 1096 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ACIE\_\-REG@{ACIE\_\-REG}}
\index{ACIE\_\-REG@{ACIE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ACIE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ACIE\_\-REG~ACSR}\label{ATmega32U6_8h_91014954027f761cdb25f96c3f118d3f}




Definition at line 1097 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ACIS0\_\-REG@{ACIS0\_\-REG}}
\index{ACIS0\_\-REG@{ACIS0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ACIS0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ACIS0\_\-REG~ACSR}\label{ATmega32U6_8h_4fdb409a7c2d253a008e306b02c61f1f}




Definition at line 1094 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ACIS1\_\-REG@{ACIS1\_\-REG}}
\index{ACIS1\_\-REG@{ACIS1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ACIS1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ACIS1\_\-REG~ACSR}\label{ATmega32U6_8h_7b3877689f2a4622a00b16b4ec90fb07}




Definition at line 1095 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ACME\_\-REG@{ACME\_\-REG}}
\index{ACME\_\-REG@{ACME\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ACME\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ACME\_\-REG~ADCSRB}\label{ATmega32U6_8h_ccc266869183f05697e710ab121290c2}




Definition at line 1067 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ACO\_\-REG@{ACO\_\-REG}}
\index{ACO\_\-REG@{ACO\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ACO\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ACO\_\-REG~ACSR}\label{ATmega32U6_8h_fb678c68cb3f8905035a41f9060e37f3}




Definition at line 1099 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADATE\_\-REG@{ADATE\_\-REG}}
\index{ADATE\_\-REG@{ADATE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADATE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADATE\_\-REG~ADCSRA}\label{ATmega32U6_8h_1ce6529af5065fe4c63f88d08ec3aea1}




Definition at line 1058 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADC0D\_\-REG@{ADC0D\_\-REG}}
\index{ADC0D\_\-REG@{ADC0D\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADC0D\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADC0D\_\-REG~DIDR0}\label{ATmega32U6_8h_929eba87ade35b10be03793169858344}




Definition at line 417 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADC1D\_\-REG@{ADC1D\_\-REG}}
\index{ADC1D\_\-REG@{ADC1D\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADC1D\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADC1D\_\-REG~DIDR0}\label{ATmega32U6_8h_bb7da425a267471d02b23a0666084e91}




Definition at line 418 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADC2D\_\-REG@{ADC2D\_\-REG}}
\index{ADC2D\_\-REG@{ADC2D\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADC2D\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADC2D\_\-REG~DIDR0}\label{ATmega32U6_8h_bb227b9bf9ecc7988c629595978b5a6f}




Definition at line 419 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADC3D\_\-REG@{ADC3D\_\-REG}}
\index{ADC3D\_\-REG@{ADC3D\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADC3D\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADC3D\_\-REG~DIDR0}\label{ATmega32U6_8h_d8f00f9cc8070f736188ab4cae47c128}




Definition at line 420 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADC4D\_\-REG@{ADC4D\_\-REG}}
\index{ADC4D\_\-REG@{ADC4D\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADC4D\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADC4D\_\-REG~DIDR0}\label{ATmega32U6_8h_a832b0af1225c88e52af58ea5de522ba}




Definition at line 421 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADC5D\_\-REG@{ADC5D\_\-REG}}
\index{ADC5D\_\-REG@{ADC5D\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADC5D\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADC5D\_\-REG~DIDR0}\label{ATmega32U6_8h_47834f0392ea57ffa6fe486c1bccb70a}




Definition at line 422 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADC6D\_\-REG@{ADC6D\_\-REG}}
\index{ADC6D\_\-REG@{ADC6D\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADC6D\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADC6D\_\-REG~DIDR0}\label{ATmega32U6_8h_c6bd558b9c55dfb53b6de2cabee1d59d}




Definition at line 423 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADC7D\_\-REG@{ADC7D\_\-REG}}
\index{ADC7D\_\-REG@{ADC7D\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADC7D\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADC7D\_\-REG~DIDR0}\label{ATmega32U6_8h_ad2da87cf6b8b0390ba5483764dfbeb6}




Definition at line 424 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCH0\_\-REG@{ADCH0\_\-REG}}
\index{ADCH0\_\-REG@{ADCH0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCH0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCH0\_\-REG~ADCH}\label{ATmega32U6_8h_5b4a5f6024b91f0ec343f6b2e28f0ba6}




Definition at line 1198 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCH1\_\-REG@{ADCH1\_\-REG}}
\index{ADCH1\_\-REG@{ADCH1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCH1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCH1\_\-REG~ADCH}\label{ATmega32U6_8h_bf915e15db6714adb7dbf30cd63b6f0c}




Definition at line 1199 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCH2\_\-REG@{ADCH2\_\-REG}}
\index{ADCH2\_\-REG@{ADCH2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCH2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCH2\_\-REG~ADCH}\label{ATmega32U6_8h_4d75afb271266da893791ef991a108b4}




Definition at line 1200 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCH3\_\-REG@{ADCH3\_\-REG}}
\index{ADCH3\_\-REG@{ADCH3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCH3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCH3\_\-REG~ADCH}\label{ATmega32U6_8h_af8e04ade90d20cb72b7e043734177b9}




Definition at line 1201 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCH4\_\-REG@{ADCH4\_\-REG}}
\index{ADCH4\_\-REG@{ADCH4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCH4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCH4\_\-REG~ADCH}\label{ATmega32U6_8h_b4013206721afd63faf57fcbe67f6bcd}




Definition at line 1202 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCH5\_\-REG@{ADCH5\_\-REG}}
\index{ADCH5\_\-REG@{ADCH5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCH5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCH5\_\-REG~ADCH}\label{ATmega32U6_8h_8a64d9461abc8d9d02cc38ec92d7f333}




Definition at line 1203 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCH6\_\-REG@{ADCH6\_\-REG}}
\index{ADCH6\_\-REG@{ADCH6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCH6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCH6\_\-REG~ADCH}\label{ATmega32U6_8h_b6bb3e6113ecddd0296e8b9490c30186}




Definition at line 1204 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCH7\_\-REG@{ADCH7\_\-REG}}
\index{ADCH7\_\-REG@{ADCH7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCH7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCH7\_\-REG~ADCH}\label{ATmega32U6_8h_f42554f76f11098e469ff92cf84fe35d}




Definition at line 1205 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCL0\_\-REG@{ADCL0\_\-REG}}
\index{ADCL0\_\-REG@{ADCL0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCL0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCL0\_\-REG~ADCL}\label{ATmega32U6_8h_4206f6448b830448d3e777cfcea62298}




Definition at line 1188 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCL1\_\-REG@{ADCL1\_\-REG}}
\index{ADCL1\_\-REG@{ADCL1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCL1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCL1\_\-REG~ADCL}\label{ATmega32U6_8h_6543c4a466b132fdacee1a80b25b482e}




Definition at line 1189 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCL2\_\-REG@{ADCL2\_\-REG}}
\index{ADCL2\_\-REG@{ADCL2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCL2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCL2\_\-REG~ADCL}\label{ATmega32U6_8h_0e464d414b6ab147352499a3ede100b7}




Definition at line 1190 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCL3\_\-REG@{ADCL3\_\-REG}}
\index{ADCL3\_\-REG@{ADCL3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCL3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCL3\_\-REG~ADCL}\label{ATmega32U6_8h_2f4c239bef5b88863ccad95757b072e7}




Definition at line 1191 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCL4\_\-REG@{ADCL4\_\-REG}}
\index{ADCL4\_\-REG@{ADCL4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCL4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCL4\_\-REG~ADCL}\label{ATmega32U6_8h_23027c916c7edcadd554b4568d7eec64}




Definition at line 1192 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCL5\_\-REG@{ADCL5\_\-REG}}
\index{ADCL5\_\-REG@{ADCL5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCL5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCL5\_\-REG~ADCL}\label{ATmega32U6_8h_dfccebee254878c9527cced15370511e}




Definition at line 1193 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCL6\_\-REG@{ADCL6\_\-REG}}
\index{ADCL6\_\-REG@{ADCL6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCL6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCL6\_\-REG~ADCL}\label{ATmega32U6_8h_72d0c56ddf4a26025a8f12b58cffe90e}




Definition at line 1194 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADCL7\_\-REG@{ADCL7\_\-REG}}
\index{ADCL7\_\-REG@{ADCL7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADCL7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADCL7\_\-REG~ADCL}\label{ATmega32U6_8h_3b66afa45275ba53254fbf51f624d60f}




Definition at line 1195 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADDEN\_\-REG@{ADDEN\_\-REG}}
\index{ADDEN\_\-REG@{ADDEN\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADDEN\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADDEN\_\-REG~UDADDR}\label{ATmega32U6_8h_e8ac294f4c646c3eeccdad93bb63811d}




Definition at line 1146 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADEN\_\-REG@{ADEN\_\-REG}}
\index{ADEN\_\-REG@{ADEN\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADEN\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADEN\_\-REG~ADCSRA}\label{ATmega32U6_8h_894e5779251d51319275bdb299b088d9}




Definition at line 1060 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADHSM\_\-REG@{ADHSM\_\-REG}}
\index{ADHSM\_\-REG@{ADHSM\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADHSM\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADHSM\_\-REG~ADCSRB}\label{ATmega32U6_8h_65424362b39a9873610dd9813599cc75}




Definition at line 1066 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADIE\_\-REG@{ADIE\_\-REG}}
\index{ADIE\_\-REG@{ADIE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADIE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADIE\_\-REG~ADCSRA}\label{ATmega32U6_8h_16690bb6f67e2192a473b405606498a3}




Definition at line 1056 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADIF\_\-REG@{ADIF\_\-REG}}
\index{ADIF\_\-REG@{ADIF\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADIF\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADIF\_\-REG~ADCSRA}\label{ATmega32U6_8h_4e71a5dff53cb732fdbcf4a21491c1b6}




Definition at line 1057 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADLAR\_\-REG@{ADLAR\_\-REG}}
\index{ADLAR\_\-REG@{ADLAR\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADLAR\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADLAR\_\-REG~ADMUX}\label{ATmega32U6_8h_18ad16735dc320ce6aa4f9eb80821c40}




Definition at line 170 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADPS0\_\-REG@{ADPS0\_\-REG}}
\index{ADPS0\_\-REG@{ADPS0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADPS0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADPS0\_\-REG~ADCSRA}\label{ATmega32U6_8h_f68cc59e7b123bb5d4a5127dbaa1a890}




Definition at line 1053 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADPS1\_\-REG@{ADPS1\_\-REG}}
\index{ADPS1\_\-REG@{ADPS1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADPS1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADPS1\_\-REG~ADCSRA}\label{ATmega32U6_8h_f9c074340db94fcd44c4c7363d850afd}




Definition at line 1054 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADPS2\_\-REG@{ADPS2\_\-REG}}
\index{ADPS2\_\-REG@{ADPS2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADPS2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADPS2\_\-REG~ADCSRA}\label{ATmega32U6_8h_d1db20ef6588ad97b3639fda5b8dcf42}




Definition at line 1055 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADSC\_\-REG@{ADSC\_\-REG}}
\index{ADSC\_\-REG@{ADSC\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADSC\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADSC\_\-REG~ADCSRA}\label{ATmega32U6_8h_d53602556f6b1f059170935e12906879}




Definition at line 1059 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADTS0\_\-REG@{ADTS0\_\-REG}}
\index{ADTS0\_\-REG@{ADTS0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADTS0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADTS0\_\-REG~ADCSRB}\label{ATmega32U6_8h_1ad1344b7dd620d3a791d6faa22f5e17}




Definition at line 1063 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADTS1\_\-REG@{ADTS1\_\-REG}}
\index{ADTS1\_\-REG@{ADTS1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADTS1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADTS1\_\-REG~ADCSRB}\label{ATmega32U6_8h_e9776ed7eca3fac1b6ab0787632de231}




Definition at line 1064 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ADTS2\_\-REG@{ADTS2\_\-REG}}
\index{ADTS2\_\-REG@{ADTS2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ADTS2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ADTS2\_\-REG~ADCSRB}\label{ATmega32U6_8h_240983b2c301b45d6efe58b6e36e6b42}




Definition at line 1065 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!AIN0D\_\-REG@{AIN0D\_\-REG}}
\index{AIN0D\_\-REG@{AIN0D\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[AIN0D\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define AIN0D\_\-REG~DIDR1}\label{ATmega32U6_8h_cfe4d2d7314690d7f15ff78f6038921a}




Definition at line 427 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!AIN1D\_\-REG@{AIN1D\_\-REG}}
\index{AIN1D\_\-REG@{AIN1D\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[AIN1D\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define AIN1D\_\-REG~DIDR1}\label{ATmega32U6_8h_1239d58acee7e91f9ba12e0e00888e02}




Definition at line 428 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ALLOC\_\-REG@{ALLOC\_\-REG}}
\index{ALLOC\_\-REG@{ALLOC\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ALLOC\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ALLOC\_\-REG~UECFG1X}\label{ATmega32U6_8h_6508c424643f8b93b8fbfc669d757d80}




Definition at line 230 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!AS2\_\-REG@{AS2\_\-REG}}
\index{AS2\_\-REG@{AS2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[AS2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define AS2\_\-REG~ASSR}\label{ATmega32U6_8h_f331dfc91d8e7b53437a8faf1004ce24}




Definition at line 446 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!BLBSET\_\-REG@{BLBSET\_\-REG}}
\index{BLBSET\_\-REG@{BLBSET\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[BLBSET\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define BLBSET\_\-REG~SPMCSR}\label{ATmega32U6_8h_7c8a500e5b966a8af0033b0bd9b3dd23}




Definition at line 1162 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!BORF\_\-REG@{BORF\_\-REG}}
\index{BORF\_\-REG@{BORF\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[BORF\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define BORF\_\-REG~MCUSR}\label{ATmega32U6_8h_286e3a35e3f66ada8021a22cc44b268d}




Definition at line 848 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!C\_\-REG@{C\_\-REG}}
\index{C\_\-REG@{C\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[C\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define C\_\-REG~SREG}\label{ATmega32U6_8h_5335949b52f31553bda075c17e0de4d8}




Definition at line 457 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CAL0\_\-REG@{CAL0\_\-REG}}
\index{CAL0\_\-REG@{CAL0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CAL0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CAL0\_\-REG~OSCCAL}\label{ATmega32U6_8h_df55f8f719da36797791c181e4f66f6b}




Definition at line 541 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CAL1\_\-REG@{CAL1\_\-REG}}
\index{CAL1\_\-REG@{CAL1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CAL1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CAL1\_\-REG~OSCCAL}\label{ATmega32U6_8h_0a9ed4d8419b97d6ff0e5cd7bff4581b}




Definition at line 542 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CAL2\_\-REG@{CAL2\_\-REG}}
\index{CAL2\_\-REG@{CAL2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CAL2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CAL2\_\-REG~OSCCAL}\label{ATmega32U6_8h_b3cf18efc048d1ecd21daaf89179e4b1}




Definition at line 543 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CAL3\_\-REG@{CAL3\_\-REG}}
\index{CAL3\_\-REG@{CAL3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CAL3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CAL3\_\-REG~OSCCAL}\label{ATmega32U6_8h_03ae39f286bd0de01594965a9158d199}




Definition at line 544 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CAL4\_\-REG@{CAL4\_\-REG}}
\index{CAL4\_\-REG@{CAL4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CAL4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CAL4\_\-REG~OSCCAL}\label{ATmega32U6_8h_fdce051f636e620501c18b27bcea8cfc}




Definition at line 545 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CAL5\_\-REG@{CAL5\_\-REG}}
\index{CAL5\_\-REG@{CAL5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CAL5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CAL5\_\-REG~OSCCAL}\label{ATmega32U6_8h_a26dd5b51d581de16cb1fae22340aabc}




Definition at line 546 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CAL6\_\-REG@{CAL6\_\-REG}}
\index{CAL6\_\-REG@{CAL6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CAL6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CAL6\_\-REG~OSCCAL}\label{ATmega32U6_8h_92798a38b8c56009490e5f8f3d716b7b}




Definition at line 547 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CAL7\_\-REG@{CAL7\_\-REG}}
\index{CAL7\_\-REG@{CAL7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CAL7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CAL7\_\-REG~OSCCAL}\label{ATmega32U6_8h_294dc6db95d5d68465f364c4afb0849d}




Definition at line 548 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CFGOK\_\-REG@{CFGOK\_\-REG}}
\index{CFGOK\_\-REG@{CFGOK\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CFGOK\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CFGOK\_\-REG~UESTA0X}\label{ATmega32U6_8h_ff759c96cd146a7d6b2e68711002aecb}




Definition at line 1175 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CLKPCE\_\-REG@{CLKPCE\_\-REG}}
\index{CLKPCE\_\-REG@{CLKPCE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CLKPCE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CLKPCE\_\-REG~CLKPR}\label{ATmega32U6_8h_f47b15cca377c713bbb974d80f62bf61}




Definition at line 454 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CLKPS0\_\-REG@{CLKPS0\_\-REG}}
\index{CLKPS0\_\-REG@{CLKPS0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CLKPS0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CLKPS0\_\-REG~CLKPR}\label{ATmega32U6_8h_a2553ac5adab16a1adef82b97aa410ff}




Definition at line 450 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CLKPS1\_\-REG@{CLKPS1\_\-REG}}
\index{CLKPS1\_\-REG@{CLKPS1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CLKPS1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CLKPS1\_\-REG~CLKPR}\label{ATmega32U6_8h_f7ff7982bf20c50da2500d70b568a2b2}




Definition at line 451 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CLKPS2\_\-REG@{CLKPS2\_\-REG}}
\index{CLKPS2\_\-REG@{CLKPS2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CLKPS2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CLKPS2\_\-REG~CLKPR}\label{ATmega32U6_8h_4b49b376cac97e02f93fdca8d8706da4}




Definition at line 452 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CLKPS3\_\-REG@{CLKPS3\_\-REG}}
\index{CLKPS3\_\-REG@{CLKPS3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CLKPS3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CLKPS3\_\-REG~CLKPR}\label{ATmega32U6_8h_3dc9e95a762e3b195323bcbaa4fd450d}




Definition at line 453 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM0A0\_\-REG@{COM0A0\_\-REG}}
\index{COM0A0\_\-REG@{COM0A0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM0A0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM0A0\_\-REG~TCCR0A}\label{ATmega32U6_8h_9c9465ff0fee821ed1763c20125f47a3}




Definition at line 654 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM0A1\_\-REG@{COM0A1\_\-REG}}
\index{COM0A1\_\-REG@{COM0A1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM0A1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM0A1\_\-REG~TCCR0A}\label{ATmega32U6_8h_3def34db20518881afd8dd086ffb398c}




Definition at line 655 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM0B0\_\-REG@{COM0B0\_\-REG}}
\index{COM0B0\_\-REG@{COM0B0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM0B0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM0B0\_\-REG~TCCR0A}\label{ATmega32U6_8h_9d23e2b8a3ebfce4226155d1ee5862a9}




Definition at line 652 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM0B1\_\-REG@{COM0B1\_\-REG}}
\index{COM0B1\_\-REG@{COM0B1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM0B1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM0B1\_\-REG~TCCR0A}\label{ATmega32U6_8h_2ce4faf67e1d6fe840938a8c4945b0eb}




Definition at line 653 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM1A0\_\-REG@{COM1A0\_\-REG}}
\index{COM1A0\_\-REG@{COM1A0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM1A0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM1A0\_\-REG~TCCR1A}\label{ATmega32U6_8h_d37d490b8d5e4d80917f0983234f2c5a}




Definition at line 518 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM1A1\_\-REG@{COM1A1\_\-REG}}
\index{COM1A1\_\-REG@{COM1A1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM1A1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM1A1\_\-REG~TCCR1A}\label{ATmega32U6_8h_57ab2253fc5ec61d0288edeaa1fd8ce0}




Definition at line 519 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM1B0\_\-REG@{COM1B0\_\-REG}}
\index{COM1B0\_\-REG@{COM1B0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM1B0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM1B0\_\-REG~TCCR1A}\label{ATmega32U6_8h_5690d6e81fd612acd36b83e7af505143}




Definition at line 516 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM1B1\_\-REG@{COM1B1\_\-REG}}
\index{COM1B1\_\-REG@{COM1B1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM1B1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM1B1\_\-REG~TCCR1A}\label{ATmega32U6_8h_be50faa4969da6cc0e2e7f0f16cfd19c}




Definition at line 517 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM1C0\_\-REG@{COM1C0\_\-REG}}
\index{COM1C0\_\-REG@{COM1C0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM1C0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM1C0\_\-REG~TCCR1A}\label{ATmega32U6_8h_72ba290b883e49613543e0377129e1c4}




Definition at line 514 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM1C1\_\-REG@{COM1C1\_\-REG}}
\index{COM1C1\_\-REG@{COM1C1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM1C1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM1C1\_\-REG~TCCR1A}\label{ATmega32U6_8h_9224e07e36a916ad8ae5b9c519f8508e}




Definition at line 515 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM2A0\_\-REG@{COM2A0\_\-REG}}
\index{COM2A0\_\-REG@{COM2A0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM2A0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM2A0\_\-REG~TCCR2A}\label{ATmega32U6_8h_9cc7e7ff2e7dfb5925d4e1b18fe94f9a}




Definition at line 882 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM2A1\_\-REG@{COM2A1\_\-REG}}
\index{COM2A1\_\-REG@{COM2A1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM2A1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM2A1\_\-REG~TCCR2A}\label{ATmega32U6_8h_8c06439550ba6bed32271161b1ae91a9}




Definition at line 883 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM2B0\_\-REG@{COM2B0\_\-REG}}
\index{COM2B0\_\-REG@{COM2B0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM2B0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM2B0\_\-REG~TCCR2A}\label{ATmega32U6_8h_7abed863e63e05edd6fd0ccf7c775d24}




Definition at line 880 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM2B1\_\-REG@{COM2B1\_\-REG}}
\index{COM2B1\_\-REG@{COM2B1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM2B1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM2B1\_\-REG~TCCR2A}\label{ATmega32U6_8h_f5291739244aba68d59f5232869b9634}




Definition at line 881 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM3A0\_\-REG@{COM3A0\_\-REG}}
\index{COM3A0\_\-REG@{COM3A0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM3A0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM3A0\_\-REG~TCCR3A}\label{ATmega32U6_8h_8f0a23a64ac4ab515a6ada02f9d8f58b}




Definition at line 773 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM3A1\_\-REG@{COM3A1\_\-REG}}
\index{COM3A1\_\-REG@{COM3A1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM3A1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM3A1\_\-REG~TCCR3A}\label{ATmega32U6_8h_f2c39335be9f9668ec0cf477500c0e22}




Definition at line 774 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM3B0\_\-REG@{COM3B0\_\-REG}}
\index{COM3B0\_\-REG@{COM3B0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM3B0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM3B0\_\-REG~TCCR3A}\label{ATmega32U6_8h_f9bc75e1fd9edc94d02dfcef8265cc46}




Definition at line 771 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM3B1\_\-REG@{COM3B1\_\-REG}}
\index{COM3B1\_\-REG@{COM3B1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM3B1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM3B1\_\-REG~TCCR3A}\label{ATmega32U6_8h_06667d75dbb8d72ee90a4dbcd84a5bcc}




Definition at line 772 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM3C0\_\-REG@{COM3C0\_\-REG}}
\index{COM3C0\_\-REG@{COM3C0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM3C0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM3C0\_\-REG~TCCR3A}\label{ATmega32U6_8h_7e46e6494564cda5ad32db5aca6f070c}




Definition at line 769 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!COM3C1\_\-REG@{COM3C1\_\-REG}}
\index{COM3C1\_\-REG@{COM3C1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[COM3C1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define COM3C1\_\-REG~TCCR3A}\label{ATmega32U6_8h_9e5c381790f8dbb8626ae14e1afb562a}




Definition at line 770 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CPHA\_\-REG@{CPHA\_\-REG}}
\index{CPHA\_\-REG@{CPHA\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CPHA\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CPHA\_\-REG~SPCR}\label{ATmega32U6_8h_a28c55e26ba79805e7da354a966d5451}




Definition at line 672 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CPOL\_\-REG@{CPOL\_\-REG}}
\index{CPOL\_\-REG@{CPOL\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CPOL\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CPOL\_\-REG~SPCR}\label{ATmega32U6_8h_7eb3eef757d7506a6dafa0b370a10b63}




Definition at line 673 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS00\_\-REG@{CS00\_\-REG}}
\index{CS00\_\-REG@{CS00\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS00\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS00\_\-REG~TCCR0B}\label{ATmega32U6_8h_d6fb22c4ce97d412dc37b55f4b35ee93}




Definition at line 639 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS01\_\-REG@{CS01\_\-REG}}
\index{CS01\_\-REG@{CS01\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS01\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS01\_\-REG~TCCR0B}\label{ATmega32U6_8h_d7a4fa68797c75de6a1926be1cfec45c}




Definition at line 640 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS02\_\-REG@{CS02\_\-REG}}
\index{CS02\_\-REG@{CS02\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS02\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS02\_\-REG~TCCR0B}\label{ATmega32U6_8h_1a9315fba28730441e7c82bb275bb9c3}




Definition at line 641 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS10\_\-REG@{CS10\_\-REG}}
\index{CS10\_\-REG@{CS10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS10\_\-REG~TCCR1B}\label{ATmega32U6_8h_4bccf13bfda930e64185bba13885c648}




Definition at line 532 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS11\_\-REG@{CS11\_\-REG}}
\index{CS11\_\-REG@{CS11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS11\_\-REG~TCCR1B}\label{ATmega32U6_8h_d99924dd14efce240828bab9be7449fe}




Definition at line 533 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS12\_\-REG@{CS12\_\-REG}}
\index{CS12\_\-REG@{CS12\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS12\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS12\_\-REG~TCCR1B}\label{ATmega32U6_8h_e76fac75534b9165e7c6b5df064b14b5}




Definition at line 534 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS20\_\-REG@{CS20\_\-REG}}
\index{CS20\_\-REG@{CS20\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS20\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS20\_\-REG~TCCR2B}\label{ATmega32U6_8h_29bb9fd717f1d7a42356e027ed760c12}




Definition at line 886 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS21\_\-REG@{CS21\_\-REG}}
\index{CS21\_\-REG@{CS21\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS21\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS21\_\-REG~TCCR2B}\label{ATmega32U6_8h_d019a205d632735f99e1bf4ba095a5ff}




Definition at line 887 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS22\_\-REG@{CS22\_\-REG}}
\index{CS22\_\-REG@{CS22\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS22\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS22\_\-REG~TCCR2B}\label{ATmega32U6_8h_1637894672f275f5d2e7dbc8949a36d2}




Definition at line 888 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS30\_\-REG@{CS30\_\-REG}}
\index{CS30\_\-REG@{CS30\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS30\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS30\_\-REG~TCCR3B}\label{ATmega32U6_8h_25a13c2df6ba5340ef310d0702dc431e}




Definition at line 758 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS31\_\-REG@{CS31\_\-REG}}
\index{CS31\_\-REG@{CS31\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS31\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS31\_\-REG~TCCR3B}\label{ATmega32U6_8h_5205d7f88a2314c0fa290395df929a36}




Definition at line 759 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CS32\_\-REG@{CS32\_\-REG}}
\index{CS32\_\-REG@{CS32\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CS32\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CS32\_\-REG~TCCR3B}\label{ATmega32U6_8h_88a36ae4256255861adf6486a3d0d19e}




Definition at line 760 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CTRLDIR\_\-REG@{CTRLDIR\_\-REG}}
\index{CTRLDIR\_\-REG@{CTRLDIR\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CTRLDIR\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CTRLDIR\_\-REG~UESTA1X}\label{ATmega32U6_8h_31ccdaa5a5946c4eed11e7e4826560a2}




Definition at line 715 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CURRBK0\_\-REG@{CURRBK0\_\-REG}}
\index{CURRBK0\_\-REG@{CURRBK0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CURRBK0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CURRBK0\_\-REG~UESTA1X}\label{ATmega32U6_8h_2957c96bfd764b769a7af1071460b039}




Definition at line 713 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!CURRBK1\_\-REG@{CURRBK1\_\-REG}}
\index{CURRBK1\_\-REG@{CURRBK1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[CURRBK1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define CURRBK1\_\-REG~UESTA1X}\label{ATmega32U6_8h_ed18eb6bda24e7731a9c7ba0321ad91d}




Definition at line 714 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDA0\_\-REG@{DDA0\_\-REG}}
\index{DDA0\_\-REG@{DDA0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDA0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDA0\_\-REG~DDRA}\label{ATmega32U6_8h_aef52c5aedb89ccabfc50839565390e2}




Definition at line 502 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDA1\_\-REG@{DDA1\_\-REG}}
\index{DDA1\_\-REG@{DDA1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDA1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDA1\_\-REG~DDRA}\label{ATmega32U6_8h_edf2c8fb8d1eb1c1e61262e344953b19}




Definition at line 503 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDA2\_\-REG@{DDA2\_\-REG}}
\index{DDA2\_\-REG@{DDA2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDA2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDA2\_\-REG~DDRA}\label{ATmega32U6_8h_f18acc40a827c632d2c6fad0906b4eba}




Definition at line 504 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDA3\_\-REG@{DDA3\_\-REG}}
\index{DDA3\_\-REG@{DDA3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDA3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDA3\_\-REG~DDRA}\label{ATmega32U6_8h_2a047ebfb566e37e3f620cbcce47048b}




Definition at line 505 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDA4\_\-REG@{DDA4\_\-REG}}
\index{DDA4\_\-REG@{DDA4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDA4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDA4\_\-REG~DDRA}\label{ATmega32U6_8h_d9298f6beb7643d24b31858390c2c7f8}




Definition at line 506 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDA5\_\-REG@{DDA5\_\-REG}}
\index{DDA5\_\-REG@{DDA5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDA5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDA5\_\-REG~DDRA}\label{ATmega32U6_8h_aeb34f94a11a2c485bfd0fa05ce22f3b}




Definition at line 507 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDA6\_\-REG@{DDA6\_\-REG}}
\index{DDA6\_\-REG@{DDA6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDA6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDA6\_\-REG~DDRA}\label{ATmega32U6_8h_d5846bc7ef66d84ad6d68fec402e2bd0}




Definition at line 508 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDA7\_\-REG@{DDA7\_\-REG}}
\index{DDA7\_\-REG@{DDA7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDA7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDA7\_\-REG~DDRA}\label{ATmega32U6_8h_bf262001da9c0b98276431dbb7f2c729}




Definition at line 509 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDB0\_\-REG@{DDB0\_\-REG}}
\index{DDB0\_\-REG@{DDB0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDB0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDB0\_\-REG~DDRB}\label{ATmega32U6_8h_7ab353495cd33f8c72f46e7d319c703a}




Definition at line 1009 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDB1\_\-REG@{DDB1\_\-REG}}
\index{DDB1\_\-REG@{DDB1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDB1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDB1\_\-REG~DDRB}\label{ATmega32U6_8h_39058410287a0eeec43e291e018d01c1}




Definition at line 1010 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDB2\_\-REG@{DDB2\_\-REG}}
\index{DDB2\_\-REG@{DDB2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDB2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDB2\_\-REG~DDRB}\label{ATmega32U6_8h_29d74f0664c454064897591d1919b293}




Definition at line 1011 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDB3\_\-REG@{DDB3\_\-REG}}
\index{DDB3\_\-REG@{DDB3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDB3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDB3\_\-REG~DDRB}\label{ATmega32U6_8h_d8a09112abdf6f164c8a71f18e8c612a}




Definition at line 1012 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDB4\_\-REG@{DDB4\_\-REG}}
\index{DDB4\_\-REG@{DDB4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDB4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDB4\_\-REG~DDRB}\label{ATmega32U6_8h_a15b3fe8b6fe58f7212e9c5d34aef6fb}




Definition at line 1013 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDB5\_\-REG@{DDB5\_\-REG}}
\index{DDB5\_\-REG@{DDB5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDB5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDB5\_\-REG~DDRB}\label{ATmega32U6_8h_d67c06d800fb1f86170187f1a5aca74c}




Definition at line 1014 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDB6\_\-REG@{DDB6\_\-REG}}
\index{DDB6\_\-REG@{DDB6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDB6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDB6\_\-REG~DDRB}\label{ATmega32U6_8h_319ef0c4c664b7b3242a2d4a39ecf8c8}




Definition at line 1015 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDB7\_\-REG@{DDB7\_\-REG}}
\index{DDB7\_\-REG@{DDB7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDB7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDB7\_\-REG~DDRB}\label{ATmega32U6_8h_e4947913fc9208758819398510f06aee}




Definition at line 1016 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDC0\_\-REG@{DDC0\_\-REG}}
\index{DDC0\_\-REG@{DDC0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDC0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDC0\_\-REG~DDRC}\label{ATmega32U6_8h_ccb031d620f90f87b9e327870bdf59dd}




Definition at line 482 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDC1\_\-REG@{DDC1\_\-REG}}
\index{DDC1\_\-REG@{DDC1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDC1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDC1\_\-REG~DDRC}\label{ATmega32U6_8h_5ab261a81b4dfb408e820cacc0514dc1}




Definition at line 483 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDC2\_\-REG@{DDC2\_\-REG}}
\index{DDC2\_\-REG@{DDC2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDC2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDC2\_\-REG~DDRC}\label{ATmega32U6_8h_14f193e23e47dc3b05a0c3c788f99094}




Definition at line 484 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDC3\_\-REG@{DDC3\_\-REG}}
\index{DDC3\_\-REG@{DDC3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDC3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDC3\_\-REG~DDRC}\label{ATmega32U6_8h_853326d165a156927b784397e90ad894}




Definition at line 485 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDC4\_\-REG@{DDC4\_\-REG}}
\index{DDC4\_\-REG@{DDC4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDC4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDC4\_\-REG~DDRC}\label{ATmega32U6_8h_c0dff827fa20acaa7dfd65d12d051790}




Definition at line 486 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDC5\_\-REG@{DDC5\_\-REG}}
\index{DDC5\_\-REG@{DDC5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDC5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDC5\_\-REG~DDRC}\label{ATmega32U6_8h_cb4f346aaa12df48a35785cc91c860ec}




Definition at line 487 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDC6\_\-REG@{DDC6\_\-REG}}
\index{DDC6\_\-REG@{DDC6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDC6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDC6\_\-REG~DDRC}\label{ATmega32U6_8h_fa585648fdb2e0cd7f82356ffd85f800}




Definition at line 488 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDC7\_\-REG@{DDC7\_\-REG}}
\index{DDC7\_\-REG@{DDC7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDC7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDC7\_\-REG~DDRC}\label{ATmega32U6_8h_a7a12a92a1b07528bf30f7fa8e367fd1}




Definition at line 489 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDD0\_\-REG@{DDD0\_\-REG}}
\index{DDD0\_\-REG@{DDD0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDD0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDD0\_\-REG~DDRD}\label{ATmega32U6_8h_152c8fee78340e396d3024e7cea88433}




Definition at line 551 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDD1\_\-REG@{DDD1\_\-REG}}
\index{DDD1\_\-REG@{DDD1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDD1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDD1\_\-REG~DDRD}\label{ATmega32U6_8h_be7032a0e18a85f4cd6d060a64802566}




Definition at line 552 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDD2\_\-REG@{DDD2\_\-REG}}
\index{DDD2\_\-REG@{DDD2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDD2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDD2\_\-REG~DDRD}\label{ATmega32U6_8h_bbe07d30279007bfe09792104c6dfae7}




Definition at line 553 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDD3\_\-REG@{DDD3\_\-REG}}
\index{DDD3\_\-REG@{DDD3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDD3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDD3\_\-REG~DDRD}\label{ATmega32U6_8h_b7ef0460abb65fc1170e8d2c314c12ff}




Definition at line 554 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDD4\_\-REG@{DDD4\_\-REG}}
\index{DDD4\_\-REG@{DDD4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDD4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDD4\_\-REG~DDRD}\label{ATmega32U6_8h_e3593bcbd12aa648e0a7021f766af483}




Definition at line 555 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDD5\_\-REG@{DDD5\_\-REG}}
\index{DDD5\_\-REG@{DDD5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDD5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDD5\_\-REG~DDRD}\label{ATmega32U6_8h_67f8dedc7647fb0bf35e667b352b6dd3}




Definition at line 556 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDD6\_\-REG@{DDD6\_\-REG}}
\index{DDD6\_\-REG@{DDD6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDD6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDD6\_\-REG~DDRD}\label{ATmega32U6_8h_04fec946d7891b6088ae9f626507a3a0}




Definition at line 557 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDD7\_\-REG@{DDD7\_\-REG}}
\index{DDD7\_\-REG@{DDD7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDD7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDD7\_\-REG~DDRD}\label{ATmega32U6_8h_ba6ff69f61f7b43237f9fff3c21bcc44}




Definition at line 558 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDE0\_\-REG@{DDE0\_\-REG}}
\index{DDE0\_\-REG@{DDE0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDE0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDE0\_\-REG~DDRE}\label{ATmega32U6_8h_f6c4c974cabea11e29b793c19cd08ee7}




Definition at line 1129 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDE1\_\-REG@{DDE1\_\-REG}}
\index{DDE1\_\-REG@{DDE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDE1\_\-REG~DDRE}\label{ATmega32U6_8h_951ce14677baf7e5d707c6f6a937960e}




Definition at line 1130 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDE2\_\-REG@{DDE2\_\-REG}}
\index{DDE2\_\-REG@{DDE2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDE2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDE2\_\-REG~DDRE}\label{ATmega32U6_8h_558153db32399a2160a68bda8ffb20c0}




Definition at line 1131 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDE3\_\-REG@{DDE3\_\-REG}}
\index{DDE3\_\-REG@{DDE3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDE3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDE3\_\-REG~DDRE}\label{ATmega32U6_8h_08b5ea208c0f9d769d6e16010eca1901}




Definition at line 1132 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDE4\_\-REG@{DDE4\_\-REG}}
\index{DDE4\_\-REG@{DDE4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDE4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDE4\_\-REG~DDRE}\label{ATmega32U6_8h_34efaea9a4001fb851751cc01580fb52}




Definition at line 1133 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDE5\_\-REG@{DDE5\_\-REG}}
\index{DDE5\_\-REG@{DDE5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDE5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDE5\_\-REG~DDRE}\label{ATmega32U6_8h_999fd8305bc1f7c97e317e60e2d78376}




Definition at line 1134 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDE6\_\-REG@{DDE6\_\-REG}}
\index{DDE6\_\-REG@{DDE6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDE6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDE6\_\-REG~DDRE}\label{ATmega32U6_8h_4ae9a30337af1c3656776e4b9e27105a}




Definition at line 1135 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDE7\_\-REG@{DDE7\_\-REG}}
\index{DDE7\_\-REG@{DDE7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDE7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDE7\_\-REG~DDRE}\label{ATmega32U6_8h_1b55c9dfe352dd584082598a1c57fdd5}




Definition at line 1136 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDF0\_\-REG@{DDF0\_\-REG}}
\index{DDF0\_\-REG@{DDF0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDF0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDF0\_\-REG~DDRF}\label{ATmega32U6_8h_26a5389a09b21adeb282e74b73ece56d}




Definition at line 431 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDF1\_\-REG@{DDF1\_\-REG}}
\index{DDF1\_\-REG@{DDF1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDF1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDF1\_\-REG~DDRF}\label{ATmega32U6_8h_ca54e71ca01dc6e92fdde6e24258dca4}




Definition at line 432 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDF2\_\-REG@{DDF2\_\-REG}}
\index{DDF2\_\-REG@{DDF2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDF2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDF2\_\-REG~DDRF}\label{ATmega32U6_8h_f46dfc711c4a02dcf20c333317a953ec}




Definition at line 433 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDF3\_\-REG@{DDF3\_\-REG}}
\index{DDF3\_\-REG@{DDF3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDF3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDF3\_\-REG~DDRF}\label{ATmega32U6_8h_f6443dbad783ab2d02aceb88ebe8bc9e}




Definition at line 434 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDF4\_\-REG@{DDF4\_\-REG}}
\index{DDF4\_\-REG@{DDF4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDF4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDF4\_\-REG~DDRF}\label{ATmega32U6_8h_0b75cf817f8e58ad3087a21419c8932c}




Definition at line 435 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDF5\_\-REG@{DDF5\_\-REG}}
\index{DDF5\_\-REG@{DDF5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDF5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDF5\_\-REG~DDRF}\label{ATmega32U6_8h_96e830527308a44bb88e6b18211bda99}




Definition at line 436 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDF6\_\-REG@{DDF6\_\-REG}}
\index{DDF6\_\-REG@{DDF6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDF6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDF6\_\-REG~DDRF}\label{ATmega32U6_8h_fbcc35ce89005143706e9d59001d02d0}




Definition at line 437 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DDF7\_\-REG@{DDF7\_\-REG}}
\index{DDF7\_\-REG@{DDF7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DDF7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DDF7\_\-REG~DDRF}\label{ATmega32U6_8h_69a52daa20ab2244682effeb8a942525}




Definition at line 438 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DETACH\_\-REG@{DETACH\_\-REG}}
\index{DETACH\_\-REG@{DETACH\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DETACH\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DETACH\_\-REG~UDCON}\label{ATmega32U6_8h_cc8b90bd26f22a343e1dfa17351b57a6}




Definition at line 591 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DOR1\_\-REG@{DOR1\_\-REG}}
\index{DOR1\_\-REG@{DOR1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DOR1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DOR1\_\-REG~UCSR1A}\label{ATmega32U6_8h_0f591778f10c8126ed35751b568ac1a0}




Definition at line 1002 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DORD\_\-REG@{DORD\_\-REG}}
\index{DORD\_\-REG@{DORD\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DORD\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DORD\_\-REG~SPCR}\label{ATmega32U6_8h_784483b3c181bd9477265a1a9d9d457d}




Definition at line 675 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DTSEQ0\_\-REG@{DTSEQ0\_\-REG}}
\index{DTSEQ0\_\-REG@{DTSEQ0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DTSEQ0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DTSEQ0\_\-REG~UESTA0X}\label{ATmega32U6_8h_9480d011e5a0815bb1ce84c73016c47f}




Definition at line 1171 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!DTSEQ1\_\-REG@{DTSEQ1\_\-REG}}
\index{DTSEQ1\_\-REG@{DTSEQ1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[DTSEQ1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define DTSEQ1\_\-REG~UESTA0X}\label{ATmega32U6_8h_1cb734fd8689076ceb18ae92dea34afa}




Definition at line 1172 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR0\_\-REG@{EEAR0\_\-REG}}
\index{EEAR0\_\-REG@{EEAR0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR0\_\-REG~EEARL}\label{ATmega32U6_8h_e1187c7c4a9a2c9a94c52f960aea72b7}




Definition at line 909 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR10\_\-REG@{EEAR10\_\-REG}}
\index{EEAR10\_\-REG@{EEAR10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR10\_\-REG~EEARH}\label{ATmega32U6_8h_b6ccd3af1a030bceeefca426aa3ba93f}




Definition at line 689 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR11\_\-REG@{EEAR11\_\-REG}}
\index{EEAR11\_\-REG@{EEAR11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR11\_\-REG~EEARH}\label{ATmega32U6_8h_30794a3478ab0591297152684b438b47}




Definition at line 690 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR1\_\-REG@{EEAR1\_\-REG}}
\index{EEAR1\_\-REG@{EEAR1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR1\_\-REG~EEARL}\label{ATmega32U6_8h_3ecedc062008b7de245537691bab01a0}




Definition at line 910 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR2\_\-REG@{EEAR2\_\-REG}}
\index{EEAR2\_\-REG@{EEAR2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR2\_\-REG~EEARL}\label{ATmega32U6_8h_d20f65b0b26eb04cfd85d58a61f1144c}




Definition at line 911 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR3\_\-REG@{EEAR3\_\-REG}}
\index{EEAR3\_\-REG@{EEAR3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR3\_\-REG~EEARL}\label{ATmega32U6_8h_c62f3e15dcda82565987d6f2c5d085b7}




Definition at line 912 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR4\_\-REG@{EEAR4\_\-REG}}
\index{EEAR4\_\-REG@{EEAR4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR4\_\-REG~EEARL}\label{ATmega32U6_8h_f5c808944940e03de96e4bc7b24c193e}




Definition at line 913 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR5\_\-REG@{EEAR5\_\-REG}}
\index{EEAR5\_\-REG@{EEAR5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR5\_\-REG~EEARL}\label{ATmega32U6_8h_89176301c1e1a7567b527dd3125e644b}




Definition at line 914 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR6\_\-REG@{EEAR6\_\-REG}}
\index{EEAR6\_\-REG@{EEAR6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR6\_\-REG~EEARL}\label{ATmega32U6_8h_8ef30328fa9ddb4fffdf336ef09c9e47}




Definition at line 915 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR7\_\-REG@{EEAR7\_\-REG}}
\index{EEAR7\_\-REG@{EEAR7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR7\_\-REG~EEARL}\label{ATmega32U6_8h_c21ffe3cf613f29c03684fd7b88e0678}




Definition at line 916 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR8\_\-REG@{EEAR8\_\-REG}}
\index{EEAR8\_\-REG@{EEAR8\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR8\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR8\_\-REG~EEARH}\label{ATmega32U6_8h_f220aa494c268a9bccf6bd06bbdbd8b5}




Definition at line 687 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEAR9\_\-REG@{EEAR9\_\-REG}}
\index{EEAR9\_\-REG@{EEAR9\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEAR9\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEAR9\_\-REG~EEARH}\label{ATmega32U6_8h_e2337b0f23a8490018c6d10afa88120b}




Definition at line 688 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEDR0\_\-REG@{EEDR0\_\-REG}}
\index{EEDR0\_\-REG@{EEDR0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEDR0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEDR0\_\-REG~EEDR}\label{ATmega32U6_8h_8d216943a0cca47e19d07df2e094dd0c}




Definition at line 193 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEDR1\_\-REG@{EEDR1\_\-REG}}
\index{EEDR1\_\-REG@{EEDR1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEDR1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEDR1\_\-REG~EEDR}\label{ATmega32U6_8h_91207268cff90964d03fba66dcf40c9b}




Definition at line 194 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEDR2\_\-REG@{EEDR2\_\-REG}}
\index{EEDR2\_\-REG@{EEDR2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEDR2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEDR2\_\-REG~EEDR}\label{ATmega32U6_8h_381678d278d3388ee7402642d9356e89}




Definition at line 195 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEDR3\_\-REG@{EEDR3\_\-REG}}
\index{EEDR3\_\-REG@{EEDR3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEDR3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEDR3\_\-REG~EEDR}\label{ATmega32U6_8h_10c53e9f8101929b0c98c7b648adf7b2}




Definition at line 196 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEDR4\_\-REG@{EEDR4\_\-REG}}
\index{EEDR4\_\-REG@{EEDR4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEDR4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEDR4\_\-REG~EEDR}\label{ATmega32U6_8h_ec27ae2a8bbeab97b48f69d029778688}




Definition at line 197 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEDR5\_\-REG@{EEDR5\_\-REG}}
\index{EEDR5\_\-REG@{EEDR5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEDR5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEDR5\_\-REG~EEDR}\label{ATmega32U6_8h_4e36ce79337901ade900f6b39e0b5cbd}




Definition at line 198 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEDR6\_\-REG@{EEDR6\_\-REG}}
\index{EEDR6\_\-REG@{EEDR6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEDR6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEDR6\_\-REG~EEDR}\label{ATmega32U6_8h_7507ac912d4263b41db72ec4ea316e3d}




Definition at line 199 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEDR7\_\-REG@{EEDR7\_\-REG}}
\index{EEDR7\_\-REG@{EEDR7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEDR7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEDR7\_\-REG~EEDR}\label{ATmega32U6_8h_1f0ea61a10f28c018a87bd8c80b1d1d0}




Definition at line 200 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEMPE\_\-REG@{EEMPE\_\-REG}}
\index{EEMPE\_\-REG@{EEMPE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEMPE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEMPE\_\-REG~EECR}\label{ATmega32U6_8h_534c85dd5d47742d53180717f8432c58}




Definition at line 854 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEPE\_\-REG@{EEPE\_\-REG}}
\index{EEPE\_\-REG@{EEPE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEPE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEPE\_\-REG~EECR}\label{ATmega32U6_8h_c8a24aa10348737c092140618df9cc34}




Definition at line 853 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEPM0\_\-REG@{EEPM0\_\-REG}}
\index{EEPM0\_\-REG@{EEPM0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEPM0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEPM0\_\-REG~EECR}\label{ATmega32U6_8h_39008c85a0c5358e43b2b21db76547c5}




Definition at line 856 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EEPM1\_\-REG@{EEPM1\_\-REG}}
\index{EEPM1\_\-REG@{EEPM1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EEPM1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EEPM1\_\-REG~EECR}\label{ATmega32U6_8h_af8ab5d087a0eb2543074269e8a55611}




Definition at line 857 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EERE\_\-REG@{EERE\_\-REG}}
\index{EERE\_\-REG@{EERE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EERE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EERE\_\-REG~EECR}\label{ATmega32U6_8h_4b0a037ffc07086c66641e936e4ab391}




Definition at line 852 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EERIE\_\-REG@{EERIE\_\-REG}}
\index{EERIE\_\-REG@{EERIE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EERIE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EERIE\_\-REG~EECR}\label{ATmega32U6_8h_4807b87f52b0b2e793969557480bdb25}




Definition at line 855 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EORSME\_\-REG@{EORSME\_\-REG}}
\index{EORSME\_\-REG@{EORSME\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EORSME\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EORSME\_\-REG~UDIEN}\label{ATmega32U6_8h_39523073d8fc02b8efed26cfb7eaf57c}




Definition at line 179 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EORSMI\_\-REG@{EORSMI\_\-REG}}
\index{EORSMI\_\-REG@{EORSMI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EORSMI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EORSMI\_\-REG~UDINT}\label{ATmega32U6_8h_14d3783498c1b2fa2348f102db002e6b}




Definition at line 217 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EORSTE\_\-REG@{EORSTE\_\-REG}}
\index{EORSTE\_\-REG@{EORSTE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EORSTE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EORSTE\_\-REG~UDIEN}\label{ATmega32U6_8h_f37f1c945cd1bd43aecb859b49ebe78e}




Definition at line 177 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EORSTI\_\-REG@{EORSTI\_\-REG}}
\index{EORSTI\_\-REG@{EORSTI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EORSTI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EORSTI\_\-REG~UDINT}\label{ATmega32U6_8h_96b60cbf72a511004f165b74643f93ee}




Definition at line 215 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPBK0\_\-REG@{EPBK0\_\-REG}}
\index{EPBK0\_\-REG@{EPBK0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPBK0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPBK0\_\-REG~UECFG1X}\label{ATmega32U6_8h_0cc03e763efd5245f1c3eae07aa8fd44}




Definition at line 231 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPBK1\_\-REG@{EPBK1\_\-REG}}
\index{EPBK1\_\-REG@{EPBK1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPBK1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPBK1\_\-REG~UECFG1X}\label{ATmega32U6_8h_45768cb6017e6de8233d9b8b1cd1c247}




Definition at line 232 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPDIR\_\-REG@{EPDIR\_\-REG}}
\index{EPDIR\_\-REG@{EPDIR\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPDIR\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPDIR\_\-REG~UECFG0X}\label{ATmega32U6_8h_0598d94ccfd02e012856303215b78d59}




Definition at line 412 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPEN\_\-REG@{EPEN\_\-REG}}
\index{EPEN\_\-REG@{EPEN\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPEN\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPEN\_\-REG~UECONX}\label{ATmega32U6_8h_3b165b5b345be535215967f483ff3235}




Definition at line 894 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPINT0\_\-REG@{EPINT0\_\-REG}}
\index{EPINT0\_\-REG@{EPINT0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPINT0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPINT0\_\-REG~UEINT}\label{ATmega32U6_8h_269ea1813125fa1f0ee57f0a4fe464f6}




Definition at line 293 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPINT1\_\-REG@{EPINT1\_\-REG}}
\index{EPINT1\_\-REG@{EPINT1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPINT1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPINT1\_\-REG~UEINT}\label{ATmega32U6_8h_45d67b06dbf294fa9b6a872ef1e17101}




Definition at line 294 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPINT2\_\-REG@{EPINT2\_\-REG}}
\index{EPINT2\_\-REG@{EPINT2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPINT2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPINT2\_\-REG~UEINT}\label{ATmega32U6_8h_20750d6cc0964acde3920905f2d48e9e}




Definition at line 295 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPINT3\_\-REG@{EPINT3\_\-REG}}
\index{EPINT3\_\-REG@{EPINT3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPINT3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPINT3\_\-REG~UEINT}\label{ATmega32U6_8h_f99c6be48010cfc87d8bb9261ef72916}




Definition at line 296 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPINT4\_\-REG@{EPINT4\_\-REG}}
\index{EPINT4\_\-REG@{EPINT4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPINT4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPINT4\_\-REG~UEINT}\label{ATmega32U6_8h_ac8c5afd8abbd5465b72ce49641ae1aa}




Definition at line 297 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPINT5\_\-REG@{EPINT5\_\-REG}}
\index{EPINT5\_\-REG@{EPINT5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPINT5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPINT5\_\-REG~UEINT}\label{ATmega32U6_8h_153b8445d149de097752950ac945e998}




Definition at line 298 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPINT6\_\-REG@{EPINT6\_\-REG}}
\index{EPINT6\_\-REG@{EPINT6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPINT6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPINT6\_\-REG~UEINT}\label{ATmega32U6_8h_c7ca5b5773d52312e3e89594a70e0560}




Definition at line 299 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPRST0\_\-REG@{EPRST0\_\-REG}}
\index{EPRST0\_\-REG@{EPRST0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPRST0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPRST0\_\-REG~UERST}\label{ATmega32U6_8h_fa2174a4e90d1e0f58f9a06740e46062}




Definition at line 221 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPRST1\_\-REG@{EPRST1\_\-REG}}
\index{EPRST1\_\-REG@{EPRST1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPRST1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPRST1\_\-REG~UERST}\label{ATmega32U6_8h_768ea41bf1eb00c5dc4f7746c9c1401f}




Definition at line 222 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPRST2\_\-REG@{EPRST2\_\-REG}}
\index{EPRST2\_\-REG@{EPRST2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPRST2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPRST2\_\-REG~UERST}\label{ATmega32U6_8h_b5153169c19dd713334c1c1e307fe87b}




Definition at line 223 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPRST3\_\-REG@{EPRST3\_\-REG}}
\index{EPRST3\_\-REG@{EPRST3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPRST3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPRST3\_\-REG~UERST}\label{ATmega32U6_8h_4e5884803662b640f7c272202e946030}




Definition at line 224 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPRST4\_\-REG@{EPRST4\_\-REG}}
\index{EPRST4\_\-REG@{EPRST4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPRST4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPRST4\_\-REG~UERST}\label{ATmega32U6_8h_ba3accc8f5f0b3f9ea1099af5eecbd56}




Definition at line 225 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPRST5\_\-REG@{EPRST5\_\-REG}}
\index{EPRST5\_\-REG@{EPRST5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPRST5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPRST5\_\-REG~UERST}\label{ATmega32U6_8h_bc0f635b6369986e91b10db295e9bc1b}




Definition at line 226 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPRST6\_\-REG@{EPRST6\_\-REG}}
\index{EPRST6\_\-REG@{EPRST6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPRST6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPRST6\_\-REG~UERST}\label{ATmega32U6_8h_9f2a123bd4650b110bd589d4c467eb9e}




Definition at line 227 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPSIZE0\_\-REG@{EPSIZE0\_\-REG}}
\index{EPSIZE0\_\-REG@{EPSIZE0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPSIZE0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPSIZE0\_\-REG~UECFG1X}\label{ATmega32U6_8h_48a40767d95513cc4f9d244c5200b49b}




Definition at line 233 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPSIZE1\_\-REG@{EPSIZE1\_\-REG}}
\index{EPSIZE1\_\-REG@{EPSIZE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPSIZE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPSIZE1\_\-REG~UECFG1X}\label{ATmega32U6_8h_8eea83b9292ad431432e6ffade0fb689}




Definition at line 234 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPSIZE2\_\-REG@{EPSIZE2\_\-REG}}
\index{EPSIZE2\_\-REG@{EPSIZE2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPSIZE2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPSIZE2\_\-REG~UECFG1X}\label{ATmega32U6_8h_f5b84bd9cf9401a8f76ff6dd512d0f48}




Definition at line 235 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPTYPE0\_\-REG@{EPTYPE0\_\-REG}}
\index{EPTYPE0\_\-REG@{EPTYPE0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPTYPE0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPTYPE0\_\-REG~UECFG0X}\label{ATmega32U6_8h_4427101a75d7d9994bf2a16ee7d75a90}




Definition at line 413 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EPTYPE1\_\-REG@{EPTYPE1\_\-REG}}
\index{EPTYPE1\_\-REG@{EPTYPE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EPTYPE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EPTYPE1\_\-REG~UECFG0X}\label{ATmega32U6_8h_924dfe392fab5cb5ae61a506fa6de2c0}




Definition at line 414 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EXCLK\_\-REG@{EXCLK\_\-REG}}
\index{EXCLK\_\-REG@{EXCLK\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EXCLK\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EXCLK\_\-REG~ASSR}\label{ATmega32U6_8h_b4fa7128d58a9fee7a4a5e7d3d764b29}




Definition at line 447 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!EXTRF\_\-REG@{EXTRF\_\-REG}}
\index{EXTRF\_\-REG@{EXTRF\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[EXTRF\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define EXTRF\_\-REG~MCUSR}\label{ATmega32U6_8h_e620c15a439519ac2da939753266acc5}




Definition at line 847 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FE1\_\-REG@{FE1\_\-REG}}
\index{FE1\_\-REG@{FE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FE1\_\-REG~UCSR1A}\label{ATmega32U6_8h_9e1a360c020ce9d6109e89fa33a6cc57}




Definition at line 1003 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FIFOCON\_\-REG@{FIFOCON\_\-REG}}
\index{FIFOCON\_\-REG@{FIFOCON\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FIFOCON\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FIFOCON\_\-REG~UEINTX}\label{ATmega32U6_8h_15fd00e12881dbe47f5ffc8955e0ab55}




Definition at line 784 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FLERRE\_\-REG@{FLERRE\_\-REG}}
\index{FLERRE\_\-REG@{FLERRE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FLERRE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FLERRE\_\-REG~UEIENX}\label{ATmega32U6_8h_63efed490ca21a78b5774c4e6bc402eb}




Definition at line 976 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FNCERR\_\-REG@{FNCERR\_\-REG}}
\index{FNCERR\_\-REG@{FNCERR\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FNCERR\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FNCERR\_\-REG~UDMFN}\label{ATmega32U6_8h_5ce1aed5fc4e1dba0891c3de339534e1}




Definition at line 647 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FOC0A\_\-REG@{FOC0A\_\-REG}}
\index{FOC0A\_\-REG@{FOC0A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FOC0A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FOC0A\_\-REG~TCCR0B}\label{ATmega32U6_8h_5273a16edbe72c0b173bcd9f63fcad5d}




Definition at line 644 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FOC0B\_\-REG@{FOC0B\_\-REG}}
\index{FOC0B\_\-REG@{FOC0B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FOC0B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FOC0B\_\-REG~TCCR0B}\label{ATmega32U6_8h_70b0e0371adb056971724bd8729b2e32}




Definition at line 643 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FOC1A\_\-REG@{FOC1A\_\-REG}}
\index{FOC1A\_\-REG@{FOC1A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FOC1A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FOC1A\_\-REG~TCCR1C}\label{ATmega32U6_8h_a32e14f137d9431fe0e40bb702b9afd3}




Definition at line 1116 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FOC1B\_\-REG@{FOC1B\_\-REG}}
\index{FOC1B\_\-REG@{FOC1B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FOC1B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FOC1B\_\-REG~TCCR1C}\label{ATmega32U6_8h_f3dcbc151387e80f44940c02e7cd867d}




Definition at line 1115 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FOC1C\_\-REG@{FOC1C\_\-REG}}
\index{FOC1C\_\-REG@{FOC1C\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FOC1C\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FOC1C\_\-REG~TCCR1C}\label{ATmega32U6_8h_acda7127774ca06903698159e6760b91}




Definition at line 1114 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FOC2A\_\-REG@{FOC2A\_\-REG}}
\index{FOC2A\_\-REG@{FOC2A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FOC2A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FOC2A\_\-REG~TCCR2B}\label{ATmega32U6_8h_42d6552741897eaa093575f1c7888436}




Definition at line 891 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FOC2B\_\-REG@{FOC2B\_\-REG}}
\index{FOC2B\_\-REG@{FOC2B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FOC2B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FOC2B\_\-REG~TCCR2B}\label{ATmega32U6_8h_9058164999064f05b1d46deeb0b9daad}




Definition at line 890 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FOC3A\_\-REG@{FOC3A\_\-REG}}
\index{FOC3A\_\-REG@{FOC3A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FOC3A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FOC3A\_\-REG~TCCR3C}\label{ATmega32U6_8h_6759dfeb5dcd47aa9ce528705512b5f2}




Definition at line 755 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FOC3B\_\-REG@{FOC3B\_\-REG}}
\index{FOC3B\_\-REG@{FOC3B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FOC3B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FOC3B\_\-REG~TCCR3C}\label{ATmega32U6_8h_035b9794256a7ff63b89dce1adf01ca2}




Definition at line 754 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FOC3C\_\-REG@{FOC3C\_\-REG}}
\index{FOC3C\_\-REG@{FOC3C\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FOC3C\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FOC3C\_\-REG~TCCR3C}\label{ATmega32U6_8h_387874a149e5137ad892b9091843fee8}




Definition at line 753 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!FRZCLK\_\-REG@{FRZCLK\_\-REG}}
\index{FRZCLK\_\-REG@{FRZCLK\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[FRZCLK\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define FRZCLK\_\-REG~USBCON}\label{ATmega32U6_8h_dc6ecb53bc841339b5b492d727ee61f8}




Definition at line 840 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR00\_\-REG@{GPIOR00\_\-REG}}
\index{GPIOR00\_\-REG@{GPIOR00\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR00\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR00\_\-REG~GPIOR0}\label{ATmega32U6_8h_b685813ba32bbaf4420521030d50c037}




Definition at line 571 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR01\_\-REG@{GPIOR01\_\-REG}}
\index{GPIOR01\_\-REG@{GPIOR01\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR01\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR01\_\-REG~GPIOR0}\label{ATmega32U6_8h_c706e7180a27bf80265fa991c48923da}




Definition at line 572 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR02\_\-REG@{GPIOR02\_\-REG}}
\index{GPIOR02\_\-REG@{GPIOR02\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR02\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR02\_\-REG~GPIOR0}\label{ATmega32U6_8h_e9a044500da3c8fd3b83ee57b753cf5a}




Definition at line 573 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR03\_\-REG@{GPIOR03\_\-REG}}
\index{GPIOR03\_\-REG@{GPIOR03\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR03\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR03\_\-REG~GPIOR0}\label{ATmega32U6_8h_7037df4b8ef967c60655040822116904}




Definition at line 574 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR04\_\-REG@{GPIOR04\_\-REG}}
\index{GPIOR04\_\-REG@{GPIOR04\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR04\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR04\_\-REG~GPIOR0}\label{ATmega32U6_8h_3bcd13cc46c1dad947f4a717886963bd}




Definition at line 575 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR05\_\-REG@{GPIOR05\_\-REG}}
\index{GPIOR05\_\-REG@{GPIOR05\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR05\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR05\_\-REG~GPIOR0}\label{ATmega32U6_8h_d17f1f3640c7c438450e1c6cd83dc416}




Definition at line 576 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR06\_\-REG@{GPIOR06\_\-REG}}
\index{GPIOR06\_\-REG@{GPIOR06\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR06\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR06\_\-REG~GPIOR0}\label{ATmega32U6_8h_34928f33c30d2778bcbd652d3bdc992e}




Definition at line 577 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR07\_\-REG@{GPIOR07\_\-REG}}
\index{GPIOR07\_\-REG@{GPIOR07\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR07\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR07\_\-REG~GPIOR0}\label{ATmega32U6_8h_80bf149d778a818c8b22d0e47d364f6c}




Definition at line 578 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR10\_\-REG@{GPIOR10\_\-REG}}
\index{GPIOR10\_\-REG@{GPIOR10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR10\_\-REG~GPIOR1}\label{ATmega32U6_8h_0c74701f14e731ccfa7947080ec1fd9f}




Definition at line 561 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR11\_\-REG@{GPIOR11\_\-REG}}
\index{GPIOR11\_\-REG@{GPIOR11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR11\_\-REG~GPIOR1}\label{ATmega32U6_8h_c89ae966cc5f650c67a4f64b533b972a}




Definition at line 562 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR12\_\-REG@{GPIOR12\_\-REG}}
\index{GPIOR12\_\-REG@{GPIOR12\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR12\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR12\_\-REG~GPIOR1}\label{ATmega32U6_8h_7f76dd7c79d2bc02264eddfb83e21f9c}




Definition at line 563 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR13\_\-REG@{GPIOR13\_\-REG}}
\index{GPIOR13\_\-REG@{GPIOR13\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR13\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR13\_\-REG~GPIOR1}\label{ATmega32U6_8h_59613cf26325e7193f38349c9172edb2}




Definition at line 564 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR14\_\-REG@{GPIOR14\_\-REG}}
\index{GPIOR14\_\-REG@{GPIOR14\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR14\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR14\_\-REG~GPIOR1}\label{ATmega32U6_8h_f6c932c67c1239f8920bea53eefbccd2}




Definition at line 565 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR15\_\-REG@{GPIOR15\_\-REG}}
\index{GPIOR15\_\-REG@{GPIOR15\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR15\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR15\_\-REG~GPIOR1}\label{ATmega32U6_8h_30ca1225d7607c42928f4cad3d965283}




Definition at line 566 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR16\_\-REG@{GPIOR16\_\-REG}}
\index{GPIOR16\_\-REG@{GPIOR16\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR16\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR16\_\-REG~GPIOR1}\label{ATmega32U6_8h_86b974ae70cbc0717a8f7515c3a458c5}




Definition at line 567 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR17\_\-REG@{GPIOR17\_\-REG}}
\index{GPIOR17\_\-REG@{GPIOR17\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR17\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR17\_\-REG~GPIOR1}\label{ATmega32U6_8h_0e49370d23d38b5a3390c338b26209fc}




Definition at line 568 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR20\_\-REG@{GPIOR20\_\-REG}}
\index{GPIOR20\_\-REG@{GPIOR20\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR20\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR20\_\-REG~GPIOR2}\label{ATmega32U6_8h_3790087c426bd43e2adddb6ecd73e386}




Definition at line 581 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR21\_\-REG@{GPIOR21\_\-REG}}
\index{GPIOR21\_\-REG@{GPIOR21\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR21\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR21\_\-REG~GPIOR2}\label{ATmega32U6_8h_940062f35eee1065c6303ac7235f559a}




Definition at line 582 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR22\_\-REG@{GPIOR22\_\-REG}}
\index{GPIOR22\_\-REG@{GPIOR22\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR22\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR22\_\-REG~GPIOR2}\label{ATmega32U6_8h_7c436e7420ded2f0613e6641d95b0c52}




Definition at line 583 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR23\_\-REG@{GPIOR23\_\-REG}}
\index{GPIOR23\_\-REG@{GPIOR23\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR23\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR23\_\-REG~GPIOR2}\label{ATmega32U6_8h_df1117d309a043e9c04be45c1b4b77a9}




Definition at line 584 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR24\_\-REG@{GPIOR24\_\-REG}}
\index{GPIOR24\_\-REG@{GPIOR24\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR24\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR24\_\-REG~GPIOR2}\label{ATmega32U6_8h_d44d09cf80aa143ae8524daf27bb7a61}




Definition at line 585 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR25\_\-REG@{GPIOR25\_\-REG}}
\index{GPIOR25\_\-REG@{GPIOR25\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR25\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR25\_\-REG~GPIOR2}\label{ATmega32U6_8h_665dd9b34b86dfda15def8fe104848cc}




Definition at line 586 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR26\_\-REG@{GPIOR26\_\-REG}}
\index{GPIOR26\_\-REG@{GPIOR26\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR26\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR26\_\-REG~GPIOR2}\label{ATmega32U6_8h_b2de6daa35a101d8ce7d3796cf633eed}




Definition at line 587 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!GPIOR27\_\-REG@{GPIOR27\_\-REG}}
\index{GPIOR27\_\-REG@{GPIOR27\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[GPIOR27\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define GPIOR27\_\-REG~GPIOR2}\label{ATmega32U6_8h_104cb3d89f026f59dfb8859ca0208116}




Definition at line 588 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!H\_\-REG@{H\_\-REG}}
\index{H\_\-REG@{H\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[H\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define H\_\-REG~SREG}\label{ATmega32U6_8h_9e7762cfa71109c938bdda8ccfd7a7e8}




Definition at line 462 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!HOST\_\-REG@{HOST\_\-REG}}
\index{HOST\_\-REG@{HOST\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[HOST\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define HOST\_\-REG~USBCON}\label{ATmega32U6_8h_6a84195f8d6402192bc2054b2eb4455b}




Definition at line 841 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!I\_\-REG@{I\_\-REG}}
\index{I\_\-REG@{I\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[I\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define I\_\-REG~SREG}\label{ATmega32U6_8h_856b2402264352968c67d30cff7b75ea}




Definition at line 464 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICES1\_\-REG@{ICES1\_\-REG}}
\index{ICES1\_\-REG@{ICES1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICES1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICES1\_\-REG~TCCR1B}\label{ATmega32U6_8h_e92e83fe84adf16f98f3b23b8f914ea8}




Definition at line 537 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICES3\_\-REG@{ICES3\_\-REG}}
\index{ICES3\_\-REG@{ICES3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICES3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICES3\_\-REG~TCCR3B}\label{ATmega32U6_8h_532c296eab34b86134a02874e6121d5e}




Definition at line 763 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICF1\_\-REG@{ICF1\_\-REG}}
\index{ICF1\_\-REG@{ICF1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICF1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICF1\_\-REG~TIFR1}\label{ATmega32U6_8h_eb06b55a40cf18b321db8df9be5b0ad2}




Definition at line 684 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICF3\_\-REG@{ICF3\_\-REG}}
\index{ICF3\_\-REG@{ICF3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICF3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICF3\_\-REG~TIFR3}\label{ATmega32U6_8h_d56e3a79802ef146a0f05a3d2fb90e74}




Definition at line 667 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICIE1\_\-REG@{ICIE1\_\-REG}}
\index{ICIE1\_\-REG@{ICIE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICIE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICIE1\_\-REG~TIMSK1}\label{ATmega32U6_8h_7a00a0ec05842970d9579232d82057e9}




Definition at line 1249 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICIE3\_\-REG@{ICIE3\_\-REG}}
\index{ICIE3\_\-REG@{ICIE3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICIE3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICIE3\_\-REG~TIMSK3}\label{ATmega32U6_8h_4199ca36678c446d830afac854d681f9}




Definition at line 1237 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICNC1\_\-REG@{ICNC1\_\-REG}}
\index{ICNC1\_\-REG@{ICNC1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICNC1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICNC1\_\-REG~TCCR1B}\label{ATmega32U6_8h_667e4c6e04c0c23cdae2a8f287a3d952}




Definition at line 538 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICNC3\_\-REG@{ICNC3\_\-REG}}
\index{ICNC3\_\-REG@{ICNC3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICNC3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICNC3\_\-REG~TCCR3B}\label{ATmega32U6_8h_50ff3e51cbadb82eadeba10158c8a2bd}




Definition at line 764 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1H0\_\-REG@{ICR1H0\_\-REG}}
\index{ICR1H0\_\-REG@{ICR1H0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1H0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1H0\_\-REG~ICR1H}\label{ATmega32U6_8h_0dd85b0a7925e38252f0815d981ac84a}




Definition at line 273 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1H1\_\-REG@{ICR1H1\_\-REG}}
\index{ICR1H1\_\-REG@{ICR1H1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1H1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1H1\_\-REG~ICR1H}\label{ATmega32U6_8h_2a414aa65c321e428ec8b47e2a5c2986}




Definition at line 274 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1H2\_\-REG@{ICR1H2\_\-REG}}
\index{ICR1H2\_\-REG@{ICR1H2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1H2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1H2\_\-REG~ICR1H}\label{ATmega32U6_8h_81f995b3e93fcccdc91c17aa36b1e508}




Definition at line 275 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1H3\_\-REG@{ICR1H3\_\-REG}}
\index{ICR1H3\_\-REG@{ICR1H3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1H3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1H3\_\-REG~ICR1H}\label{ATmega32U6_8h_8212333dfb2f3211c3b3c47141b1445f}




Definition at line 276 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1H4\_\-REG@{ICR1H4\_\-REG}}
\index{ICR1H4\_\-REG@{ICR1H4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1H4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1H4\_\-REG~ICR1H}\label{ATmega32U6_8h_d9f8ecadab2e5c7538d5daa95a8a75c9}




Definition at line 277 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1H5\_\-REG@{ICR1H5\_\-REG}}
\index{ICR1H5\_\-REG@{ICR1H5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1H5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1H5\_\-REG~ICR1H}\label{ATmega32U6_8h_7cc78daff77053399d6cfa41097b288c}




Definition at line 278 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1H6\_\-REG@{ICR1H6\_\-REG}}
\index{ICR1H6\_\-REG@{ICR1H6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1H6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1H6\_\-REG~ICR1H}\label{ATmega32U6_8h_cb97e5c5a5919ef84fbf406601351bcd}




Definition at line 279 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1H7\_\-REG@{ICR1H7\_\-REG}}
\index{ICR1H7\_\-REG@{ICR1H7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1H7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1H7\_\-REG~ICR1H}\label{ATmega32U6_8h_014c9ea996b7a18ad73cdb3bd2dccfe2}




Definition at line 280 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1L0\_\-REG@{ICR1L0\_\-REG}}
\index{ICR1L0\_\-REG@{ICR1L0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1L0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1L0\_\-REG~ICR1L}\label{ATmega32U6_8h_e95fa222590af63f1c7a5f70b25faaf3}




Definition at line 283 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1L1\_\-REG@{ICR1L1\_\-REG}}
\index{ICR1L1\_\-REG@{ICR1L1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1L1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1L1\_\-REG~ICR1L}\label{ATmega32U6_8h_27ea7b185d85e278b158ecb430b7e8ef}




Definition at line 284 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1L2\_\-REG@{ICR1L2\_\-REG}}
\index{ICR1L2\_\-REG@{ICR1L2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1L2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1L2\_\-REG~ICR1L}\label{ATmega32U6_8h_6b333223705ca3854f6b25ed303b5953}




Definition at line 285 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1L3\_\-REG@{ICR1L3\_\-REG}}
\index{ICR1L3\_\-REG@{ICR1L3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1L3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1L3\_\-REG~ICR1L}\label{ATmega32U6_8h_a6b87442d23c026c47c3198919dddcbd}




Definition at line 286 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1L4\_\-REG@{ICR1L4\_\-REG}}
\index{ICR1L4\_\-REG@{ICR1L4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1L4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1L4\_\-REG~ICR1L}\label{ATmega32U6_8h_c63ec2126cf0905534aea22a18861df6}




Definition at line 287 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1L5\_\-REG@{ICR1L5\_\-REG}}
\index{ICR1L5\_\-REG@{ICR1L5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1L5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1L5\_\-REG~ICR1L}\label{ATmega32U6_8h_6a3d7c8b564b3652f7c04fd4b6813667}




Definition at line 288 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1L6\_\-REG@{ICR1L6\_\-REG}}
\index{ICR1L6\_\-REG@{ICR1L6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1L6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1L6\_\-REG~ICR1L}\label{ATmega32U6_8h_9968f0ad26bffd020382659080b847ed}




Definition at line 289 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR1L7\_\-REG@{ICR1L7\_\-REG}}
\index{ICR1L7\_\-REG@{ICR1L7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR1L7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR1L7\_\-REG~ICR1L}\label{ATmega32U6_8h_79a04d03d46f919a8a5f7d484242c545}




Definition at line 290 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3H0\_\-REG@{ICR3H0\_\-REG}}
\index{ICR3H0\_\-REG@{ICR3H0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3H0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3H0\_\-REG~ICR3H}\label{ATmega32U6_8h_f6fac66cb605205219200770988760c6}




Definition at line 1119 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3H1\_\-REG@{ICR3H1\_\-REG}}
\index{ICR3H1\_\-REG@{ICR3H1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3H1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3H1\_\-REG~ICR3H}\label{ATmega32U6_8h_9e875b7411660e2bbe76df41d353b634}




Definition at line 1120 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3H2\_\-REG@{ICR3H2\_\-REG}}
\index{ICR3H2\_\-REG@{ICR3H2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3H2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3H2\_\-REG~ICR3H}\label{ATmega32U6_8h_dca72f9868b76cf63dae0c33a6adeaf9}




Definition at line 1121 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3H3\_\-REG@{ICR3H3\_\-REG}}
\index{ICR3H3\_\-REG@{ICR3H3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3H3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3H3\_\-REG~ICR3H}\label{ATmega32U6_8h_dc9247486b3c719dcc7be64f6ed5d4c8}




Definition at line 1122 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3H4\_\-REG@{ICR3H4\_\-REG}}
\index{ICR3H4\_\-REG@{ICR3H4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3H4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3H4\_\-REG~ICR3H}\label{ATmega32U6_8h_c1459a0525d637070614e35198151dce}




Definition at line 1123 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3H5\_\-REG@{ICR3H5\_\-REG}}
\index{ICR3H5\_\-REG@{ICR3H5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3H5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3H5\_\-REG~ICR3H}\label{ATmega32U6_8h_fc910935f4da7b2e5643e5871f7938ee}




Definition at line 1124 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3H6\_\-REG@{ICR3H6\_\-REG}}
\index{ICR3H6\_\-REG@{ICR3H6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3H6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3H6\_\-REG~ICR3H}\label{ATmega32U6_8h_388521ce508f153b7fb8c82a905c7016}




Definition at line 1125 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3H7\_\-REG@{ICR3H7\_\-REG}}
\index{ICR3H7\_\-REG@{ICR3H7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3H7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3H7\_\-REG~ICR3H}\label{ATmega32U6_8h_120d6287ecad52d59d58f59cbbab3ed9}




Definition at line 1126 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3L0\_\-REG@{ICR3L0\_\-REG}}
\index{ICR3L0\_\-REG@{ICR3L0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3L0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3L0\_\-REG~ICR3L}\label{ATmega32U6_8h_b0d8e2a174cde0629a6f7390a5a63f26}




Definition at line 1149 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3L1\_\-REG@{ICR3L1\_\-REG}}
\index{ICR3L1\_\-REG@{ICR3L1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3L1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3L1\_\-REG~ICR3L}\label{ATmega32U6_8h_be20851ce52db3629e83d8ba24bff565}




Definition at line 1150 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3L2\_\-REG@{ICR3L2\_\-REG}}
\index{ICR3L2\_\-REG@{ICR3L2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3L2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3L2\_\-REG~ICR3L}\label{ATmega32U6_8h_b0a4b99011d8e419b65adb62e66a2290}




Definition at line 1151 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3L3\_\-REG@{ICR3L3\_\-REG}}
\index{ICR3L3\_\-REG@{ICR3L3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3L3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3L3\_\-REG~ICR3L}\label{ATmega32U6_8h_0cb380e8297d165e81a9af6b21d4f52d}




Definition at line 1152 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3L4\_\-REG@{ICR3L4\_\-REG}}
\index{ICR3L4\_\-REG@{ICR3L4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3L4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3L4\_\-REG~ICR3L}\label{ATmega32U6_8h_8fa5aa3e089dc5720166eb03fc1dff73}




Definition at line 1153 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3L5\_\-REG@{ICR3L5\_\-REG}}
\index{ICR3L5\_\-REG@{ICR3L5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3L5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3L5\_\-REG~ICR3L}\label{ATmega32U6_8h_3aabb05b586eb7148a05fcfe33c88040}




Definition at line 1154 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3L6\_\-REG@{ICR3L6\_\-REG}}
\index{ICR3L6\_\-REG@{ICR3L6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3L6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3L6\_\-REG~ICR3L}\label{ATmega32U6_8h_a74b804704605cdb8843cc2f954ac113}




Definition at line 1155 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ICR3L7\_\-REG@{ICR3L7\_\-REG}}
\index{ICR3L7\_\-REG@{ICR3L7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ICR3L7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ICR3L7\_\-REG~ICR3L}\label{ATmega32U6_8h_601b4a36668569979f436032bfeeca13}




Definition at line 1156 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ID\_\-REG@{ID\_\-REG}}
\index{ID\_\-REG@{ID\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ID\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ID\_\-REG~USBSTA}\label{ATmega32U6_8h_95c754a9fe808331240df62b32f782d5}




Definition at line 966 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!IDTE\_\-REG@{IDTE\_\-REG}}
\index{IDTE\_\-REG@{IDTE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[IDTE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define IDTE\_\-REG~USBCON}\label{ATmega32U6_8h_3ba4add674c0cde34b55114e1bc39b7e}




Definition at line 838 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!IDTI\_\-REG@{IDTI\_\-REG}}
\index{IDTI\_\-REG@{IDTI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[IDTI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define IDTI\_\-REG~USBINT}\label{ATmega32U6_8h_862ffb637b12820eff09db13d8750da7}




Definition at line 600 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INT0\_\-REG@{INT0\_\-REG}}
\index{INT0\_\-REG@{INT0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INT0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INT0\_\-REG~EIMSK}\label{ATmega32U6_8h_ef41b7ee03276d4f5fcd2255aba0dce4}




Definition at line 362 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INT1\_\-REG@{INT1\_\-REG}}
\index{INT1\_\-REG@{INT1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INT1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INT1\_\-REG~EIMSK}\label{ATmega32U6_8h_ed8a95911748ccc51f86338edd2a850c}




Definition at line 363 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INT2\_\-REG@{INT2\_\-REG}}
\index{INT2\_\-REG@{INT2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INT2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INT2\_\-REG~EIMSK}\label{ATmega32U6_8h_ea735ad7d48b20943b32340fa26a4073}




Definition at line 364 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INT3\_\-REG@{INT3\_\-REG}}
\index{INT3\_\-REG@{INT3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INT3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INT3\_\-REG~EIMSK}\label{ATmega32U6_8h_f47858a0ab6e747d696d3d34b2f8b657}




Definition at line 365 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INT4\_\-REG@{INT4\_\-REG}}
\index{INT4\_\-REG@{INT4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INT4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INT4\_\-REG~EIMSK}\label{ATmega32U6_8h_0996dbce0e73fdc42a34f2f85d7c6bae}




Definition at line 366 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INT5\_\-REG@{INT5\_\-REG}}
\index{INT5\_\-REG@{INT5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INT5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INT5\_\-REG~EIMSK}\label{ATmega32U6_8h_9c1a02690b71db70a2b68bd2b34a8feb}




Definition at line 367 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INT6\_\-REG@{INT6\_\-REG}}
\index{INT6\_\-REG@{INT6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INT6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INT6\_\-REG~EIMSK}\label{ATmega32U6_8h_9960149501aee6056b08ad399546532d}




Definition at line 368 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INT7\_\-REG@{INT7\_\-REG}}
\index{INT7\_\-REG@{INT7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INT7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INT7\_\-REG~EIMSK}\label{ATmega32U6_8h_999418c0ef7ab923fa8269dfccfb9021}




Definition at line 369 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INTF0\_\-REG@{INTF0\_\-REG}}
\index{INTF0\_\-REG@{INTF0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INTF0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INTF0\_\-REG~EIFR}\label{ATmega32U6_8h_c8eea570a562240195a8d71daa36a15a}




Definition at line 1305 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INTF1\_\-REG@{INTF1\_\-REG}}
\index{INTF1\_\-REG@{INTF1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INTF1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INTF1\_\-REG~EIFR}\label{ATmega32U6_8h_18326e0f6547e43792de1ed122ee4382}




Definition at line 1306 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INTF2\_\-REG@{INTF2\_\-REG}}
\index{INTF2\_\-REG@{INTF2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INTF2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INTF2\_\-REG~EIFR}\label{ATmega32U6_8h_05ff50f0cf4c490f7b45a9506f07c116}




Definition at line 1307 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INTF3\_\-REG@{INTF3\_\-REG}}
\index{INTF3\_\-REG@{INTF3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INTF3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INTF3\_\-REG~EIFR}\label{ATmega32U6_8h_2bc3a324ee02d7ebeb0767ded371bd6b}




Definition at line 1308 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INTF4\_\-REG@{INTF4\_\-REG}}
\index{INTF4\_\-REG@{INTF4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INTF4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INTF4\_\-REG~EIFR}\label{ATmega32U6_8h_706ebd44137f21df664244f0043267ee}




Definition at line 1309 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INTF5\_\-REG@{INTF5\_\-REG}}
\index{INTF5\_\-REG@{INTF5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INTF5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INTF5\_\-REG~EIFR}\label{ATmega32U6_8h_03eef036077091bf1621317205273f64}




Definition at line 1310 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INTF6\_\-REG@{INTF6\_\-REG}}
\index{INTF6\_\-REG@{INTF6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INTF6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INTF6\_\-REG~EIFR}\label{ATmega32U6_8h_e91859e0d5ea999a910b6840bdd01e8c}




Definition at line 1311 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!INTF7\_\-REG@{INTF7\_\-REG}}
\index{INTF7\_\-REG@{INTF7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[INTF7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define INTF7\_\-REG~EIFR}\label{ATmega32U6_8h_edae29e55a89689a6b591e33876554f9}




Definition at line 1312 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC00\_\-REG@{ISC00\_\-REG}}
\index{ISC00\_\-REG@{ISC00\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC00\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC00\_\-REG~EICRA}\label{ATmega32U6_8h_21c52d8f7ccc0b73261c2871950dec5f}




Definition at line 402 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC01\_\-REG@{ISC01\_\-REG}}
\index{ISC01\_\-REG@{ISC01\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC01\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC01\_\-REG~EICRA}\label{ATmega32U6_8h_1d3247e568986e0a910394086a1aa8a8}




Definition at line 403 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC10\_\-REG@{ISC10\_\-REG}}
\index{ISC10\_\-REG@{ISC10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC10\_\-REG~EICRA}\label{ATmega32U6_8h_d8fcec19bf04f6c2fdd03b92511928b8}




Definition at line 404 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC11\_\-REG@{ISC11\_\-REG}}
\index{ISC11\_\-REG@{ISC11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC11\_\-REG~EICRA}\label{ATmega32U6_8h_dcec47801cf8ca8953ebc068cfa097c8}




Definition at line 405 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC20\_\-REG@{ISC20\_\-REG}}
\index{ISC20\_\-REG@{ISC20\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC20\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC20\_\-REG~EICRA}\label{ATmega32U6_8h_07ddc6fbbaea79b0d8e327399ace7343}




Definition at line 406 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC21\_\-REG@{ISC21\_\-REG}}
\index{ISC21\_\-REG@{ISC21\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC21\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC21\_\-REG~EICRA}\label{ATmega32U6_8h_1c4f80e5ee5e9ff648be2f1378827af4}




Definition at line 407 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC30\_\-REG@{ISC30\_\-REG}}
\index{ISC30\_\-REG@{ISC30\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC30\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC30\_\-REG~EICRA}\label{ATmega32U6_8h_708c40b174145e7a0bdbf82c42413426}




Definition at line 408 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC31\_\-REG@{ISC31\_\-REG}}
\index{ISC31\_\-REG@{ISC31\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC31\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC31\_\-REG~EICRA}\label{ATmega32U6_8h_3947671fbfd87c7b6fe0372940cdccd0}




Definition at line 409 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC40\_\-REG@{ISC40\_\-REG}}
\index{ISC40\_\-REG@{ISC40\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC40\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC40\_\-REG~EICRB}\label{ATmega32U6_8h_ebf67d2687ea57a19ff631a39e50abab}




Definition at line 382 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC41\_\-REG@{ISC41\_\-REG}}
\index{ISC41\_\-REG@{ISC41\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC41\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC41\_\-REG~EICRB}\label{ATmega32U6_8h_aa3ac918d5f22a4a5c61ba33a862ae48}




Definition at line 383 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC50\_\-REG@{ISC50\_\-REG}}
\index{ISC50\_\-REG@{ISC50\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC50\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC50\_\-REG~EICRB}\label{ATmega32U6_8h_f71beeddeaa1e72e755555362adf794e}




Definition at line 384 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC51\_\-REG@{ISC51\_\-REG}}
\index{ISC51\_\-REG@{ISC51\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC51\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC51\_\-REG~EICRB}\label{ATmega32U6_8h_375a93fa2522cba20608cbeaa28c0ad1}




Definition at line 385 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC60\_\-REG@{ISC60\_\-REG}}
\index{ISC60\_\-REG@{ISC60\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC60\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC60\_\-REG~EICRB}\label{ATmega32U6_8h_34380dbc1ccc534433c96f5c74896832}




Definition at line 386 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC61\_\-REG@{ISC61\_\-REG}}
\index{ISC61\_\-REG@{ISC61\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC61\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC61\_\-REG~EICRB}\label{ATmega32U6_8h_b3be5ced5b5c5c4b895697bfa0c2f79d}




Definition at line 387 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC70\_\-REG@{ISC70\_\-REG}}
\index{ISC70\_\-REG@{ISC70\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC70\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC70\_\-REG~EICRB}\label{ATmega32U6_8h_d7a26ac902de95f5acb8838eee20322a}




Definition at line 388 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!ISC71\_\-REG@{ISC71\_\-REG}}
\index{ISC71\_\-REG@{ISC71\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[ISC71\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define ISC71\_\-REG~EICRB}\label{ATmega32U6_8h_67db84ae63a1bb6018010dd02509f421}




Definition at line 389 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!IVCE\_\-REG@{IVCE\_\-REG}}
\index{IVCE\_\-REG@{IVCE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[IVCE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define IVCE\_\-REG~MCUCR}\label{ATmega32U6_8h_a2d0b2fab1e834745137c45cdc990652}




Definition at line 920 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!IVSEL\_\-REG@{IVSEL\_\-REG}}
\index{IVSEL\_\-REG@{IVSEL\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[IVSEL\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define IVSEL\_\-REG~MCUCR}\label{ATmega32U6_8h_4b1c656675f122c04630fd0059be6a42}




Definition at line 921 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!JTD\_\-REG@{JTD\_\-REG}}
\index{JTD\_\-REG@{JTD\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[JTD\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define JTD\_\-REG~MCUCR}\label{ATmega32U6_8h_2dceb15d0c659678824af95799179951}




Definition at line 919 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!JTRF\_\-REG@{JTRF\_\-REG}}
\index{JTRF\_\-REG@{JTRF\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[JTRF\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define JTRF\_\-REG~MCUSR}\label{ATmega32U6_8h_ccd93f42b9845213793482a88a7d1e9a}




Definition at line 845 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!LSM\_\-REG@{LSM\_\-REG}}
\index{LSM\_\-REG@{LSM\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[LSM\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define LSM\_\-REG~UDCON}\label{ATmega32U6_8h_149f3a111ba68dafe2c94ea36d67042f}




Definition at line 593 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!MPCM1\_\-REG@{MPCM1\_\-REG}}
\index{MPCM1\_\-REG@{MPCM1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[MPCM1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define MPCM1\_\-REG~UCSR1A}\label{ATmega32U6_8h_6e1a9a2487659af73bce2e1058e279ec}




Definition at line 999 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!MSTR\_\-REG@{MSTR\_\-REG}}
\index{MSTR\_\-REG@{MSTR\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[MSTR\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define MSTR\_\-REG~SPCR}\label{ATmega32U6_8h_703198bb1a73ec980c5616b3e42fd8e1}




Definition at line 674 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!MUX0\_\-REG@{MUX0\_\-REG}}
\index{MUX0\_\-REG@{MUX0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[MUX0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define MUX0\_\-REG~ADMUX}\label{ATmega32U6_8h_ad7153866c349c19882e6c4ad03dc967}




Definition at line 165 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!MUX1\_\-REG@{MUX1\_\-REG}}
\index{MUX1\_\-REG@{MUX1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[MUX1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define MUX1\_\-REG~ADMUX}\label{ATmega32U6_8h_c92509a04e802dc37f1a9d74d2d91acf}




Definition at line 166 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!MUX2\_\-REG@{MUX2\_\-REG}}
\index{MUX2\_\-REG@{MUX2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[MUX2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define MUX2\_\-REG~ADMUX}\label{ATmega32U6_8h_b83108254bd47fda37d0788b4c8dd1fd}




Definition at line 167 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!MUX3\_\-REG@{MUX3\_\-REG}}
\index{MUX3\_\-REG@{MUX3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[MUX3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define MUX3\_\-REG~ADMUX}\label{ATmega32U6_8h_f137d4cf4a3ef0e748d21b86b09d1fd8}




Definition at line 168 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!MUX4\_\-REG@{MUX4\_\-REG}}
\index{MUX4\_\-REG@{MUX4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[MUX4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define MUX4\_\-REG~ADMUX}\label{ATmega32U6_8h_05864f3e90f7e93cdd1a383dc94e8c71}




Definition at line 169 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!N\_\-REG@{N\_\-REG}}
\index{N\_\-REG@{N\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[N\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define N\_\-REG~SREG}\label{ATmega32U6_8h_22560b62179eb57d9a1f102291689234}




Definition at line 459 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!NAKINE\_\-REG@{NAKINE\_\-REG}}
\index{NAKINE\_\-REG@{NAKINE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[NAKINE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define NAKINE\_\-REG~UEIENX}\label{ATmega32U6_8h_270f627a3132cba19b3ed6fccc5b364b}




Definition at line 975 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!NAKINI\_\-REG@{NAKINI\_\-REG}}
\index{NAKINI\_\-REG@{NAKINI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[NAKINI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define NAKINI\_\-REG~UEINTX}\label{ATmega32U6_8h_9e75edf443ad5143d4f1662317738c8f}




Definition at line 783 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!NAKOUTE\_\-REG@{NAKOUTE\_\-REG}}
\index{NAKOUTE\_\-REG@{NAKOUTE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[NAKOUTE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define NAKOUTE\_\-REG~UEIENX}\label{ATmega32U6_8h_55a5de8e1a3690dba842d32a59e3df37}




Definition at line 974 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!NAKOUTI\_\-REG@{NAKOUTI\_\-REG}}
\index{NAKOUTI\_\-REG@{NAKOUTI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[NAKOUTI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define NAKOUTI\_\-REG~UEINTX}\label{ATmega32U6_8h_b503c962986de9b3d6acf3f0793b7b1c}




Definition at line 781 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!NBUSYBK0\_\-REG@{NBUSYBK0\_\-REG}}
\index{NBUSYBK0\_\-REG@{NBUSYBK0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[NBUSYBK0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define NBUSYBK0\_\-REG~UESTA0X}\label{ATmega32U6_8h_09cf3a4b0607f1789871e8911bfe2efb}




Definition at line 1169 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!NBUSYBK1\_\-REG@{NBUSYBK1\_\-REG}}
\index{NBUSYBK1\_\-REG@{NBUSYBK1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[NBUSYBK1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define NBUSYBK1\_\-REG~UESTA0X}\label{ATmega32U6_8h_bb9cb1635c35aa6ea763f58b14434b33}




Definition at line 1170 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCDR0\_\-REG@{OCDR0\_\-REG}}
\index{OCDR0\_\-REG@{OCDR0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCDR0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCDR0\_\-REG~OCDR}\label{ATmega32U6_8h_cae036eb7a818ec85803c54fc0ceebd4}




Definition at line 945 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCDR1\_\-REG@{OCDR1\_\-REG}}
\index{OCDR1\_\-REG@{OCDR1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCDR1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCDR1\_\-REG~OCDR}\label{ATmega32U6_8h_78d9d7927692ba1da3b0326a0e3558f3}




Definition at line 946 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCDR2\_\-REG@{OCDR2\_\-REG}}
\index{OCDR2\_\-REG@{OCDR2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCDR2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCDR2\_\-REG~OCDR}\label{ATmega32U6_8h_531c89104fc148b8639a5875a9794c38}




Definition at line 947 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCDR3\_\-REG@{OCDR3\_\-REG}}
\index{OCDR3\_\-REG@{OCDR3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCDR3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCDR3\_\-REG~OCDR}\label{ATmega32U6_8h_a903a63dfd732e280caad5c6f6c7e6ee}




Definition at line 948 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCDR4\_\-REG@{OCDR4\_\-REG}}
\index{OCDR4\_\-REG@{OCDR4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCDR4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCDR4\_\-REG~OCDR}\label{ATmega32U6_8h_17b571ffb17da2f4f6fd8f256ae0dde0}




Definition at line 949 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCDR5\_\-REG@{OCDR5\_\-REG}}
\index{OCDR5\_\-REG@{OCDR5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCDR5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCDR5\_\-REG~OCDR}\label{ATmega32U6_8h_0855308ed3c3e7ed8ec528e494e942ea}




Definition at line 950 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCDR6\_\-REG@{OCDR6\_\-REG}}
\index{OCDR6\_\-REG@{OCDR6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCDR6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCDR6\_\-REG~OCDR}\label{ATmega32U6_8h_0b7262a8c150a103fbe5a6b20d4ef09e}




Definition at line 951 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCDR7\_\-REG@{OCDR7\_\-REG}}
\index{OCDR7\_\-REG@{OCDR7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCDR7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCDR7\_\-REG~OCDR}\label{ATmega32U6_8h_ba8af8d16fb3f17a3e4c00d2d195e96e}




Definition at line 952 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCF0A\_\-REG@{OCF0A\_\-REG}}
\index{OCF0A\_\-REG@{OCF0A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCF0A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCF0A\_\-REG~TIFR0}\label{ATmega32U6_8h_3f48357e922f77b8fd07213ee72f6569}




Definition at line 1366 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCF0B\_\-REG@{OCF0B\_\-REG}}
\index{OCF0B\_\-REG@{OCF0B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCF0B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCF0B\_\-REG~TIFR0}\label{ATmega32U6_8h_f5f73cadcda2b3b40e99b59ac99e27a6}




Definition at line 1367 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCF1A\_\-REG@{OCF1A\_\-REG}}
\index{OCF1A\_\-REG@{OCF1A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCF1A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCF1A\_\-REG~TIFR1}\label{ATmega32U6_8h_e5a9fd43ec78b0c6e7539d83dd7926d0}




Definition at line 681 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCF1B\_\-REG@{OCF1B\_\-REG}}
\index{OCF1B\_\-REG@{OCF1B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCF1B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCF1B\_\-REG~TIFR1}\label{ATmega32U6_8h_19204424f02b6bc01cd85668a8253653}




Definition at line 682 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCF1C\_\-REG@{OCF1C\_\-REG}}
\index{OCF1C\_\-REG@{OCF1C\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCF1C\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCF1C\_\-REG~TIFR1}\label{ATmega32U6_8h_e899feb92fc67037b216ebfd3802023b}




Definition at line 683 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCF2A\_\-REG@{OCF2A\_\-REG}}
\index{OCF2A\_\-REG@{OCF2A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCF2A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCF2A\_\-REG~TIFR2}\label{ATmega32U6_8h_820d6fdac7f3f6be9b35d882f36b8fcd}




Definition at line 659 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCF2B\_\-REG@{OCF2B\_\-REG}}
\index{OCF2B\_\-REG@{OCF2B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCF2B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCF2B\_\-REG~TIFR2}\label{ATmega32U6_8h_2f7df166868590dd505bc9308367766c}




Definition at line 660 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCF3A\_\-REG@{OCF3A\_\-REG}}
\index{OCF3A\_\-REG@{OCF3A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCF3A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCF3A\_\-REG~TIFR3}\label{ATmega32U6_8h_def142149b0b4f215621dca32a34a025}




Definition at line 664 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCF3B\_\-REG@{OCF3B\_\-REG}}
\index{OCF3B\_\-REG@{OCF3B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCF3B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCF3B\_\-REG~TIFR3}\label{ATmega32U6_8h_f5bc28d005cb03e7407aee6796a97c8f}




Definition at line 665 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCF3C\_\-REG@{OCF3C\_\-REG}}
\index{OCF3C\_\-REG@{OCF3C\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCF3C\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCF3C\_\-REG~TIFR3}\label{ATmega32U6_8h_2fd33f6677d2a81f34f182ec9aef3879}




Definition at line 666 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCIE0A\_\-REG@{OCIE0A\_\-REG}}
\index{OCIE0A\_\-REG@{OCIE0A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCIE0A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCIE0A\_\-REG~TIMSK0}\label{ATmega32U6_8h_b5623e5597e7929772a52ce8a5e35294}




Definition at line 1241 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCIE0B\_\-REG@{OCIE0B\_\-REG}}
\index{OCIE0B\_\-REG@{OCIE0B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCIE0B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCIE0B\_\-REG~TIMSK0}\label{ATmega32U6_8h_04c1067deee0b48f3d9e21fcaa364107}




Definition at line 1242 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCIE1A\_\-REG@{OCIE1A\_\-REG}}
\index{OCIE1A\_\-REG@{OCIE1A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCIE1A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCIE1A\_\-REG~TIMSK1}\label{ATmega32U6_8h_6854b762f72186a69a1dd3f894dba314}




Definition at line 1246 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCIE1B\_\-REG@{OCIE1B\_\-REG}}
\index{OCIE1B\_\-REG@{OCIE1B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCIE1B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCIE1B\_\-REG~TIMSK1}\label{ATmega32U6_8h_3e8f094902415901534c310eda7676b6}




Definition at line 1247 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCIE1C\_\-REG@{OCIE1C\_\-REG}}
\index{OCIE1C\_\-REG@{OCIE1C\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCIE1C\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCIE1C\_\-REG~TIMSK1}\label{ATmega32U6_8h_4306f86b8ae45fbf232ce7535e4e7ebc}




Definition at line 1248 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCIE2A\_\-REG@{OCIE2A\_\-REG}}
\index{OCIE2A\_\-REG@{OCIE2A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCIE2A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCIE2A\_\-REG~TIMSK2}\label{ATmega32U6_8h_40c35c92b6563a3816d32b153659a6f6}




Definition at line 1229 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCIE2B\_\-REG@{OCIE2B\_\-REG}}
\index{OCIE2B\_\-REG@{OCIE2B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCIE2B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCIE2B\_\-REG~TIMSK2}\label{ATmega32U6_8h_e5744993a702040333ad770f46deebc7}




Definition at line 1230 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCIE3A\_\-REG@{OCIE3A\_\-REG}}
\index{OCIE3A\_\-REG@{OCIE3A\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCIE3A\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCIE3A\_\-REG~TIMSK3}\label{ATmega32U6_8h_4b4e53063af2d965aaeb8b5cf1f29dc8}




Definition at line 1234 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCIE3B\_\-REG@{OCIE3B\_\-REG}}
\index{OCIE3B\_\-REG@{OCIE3B\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCIE3B\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCIE3B\_\-REG~TIMSK3}\label{ATmega32U6_8h_fc20d4980bf4d7a0e25bcf5befe119b4}




Definition at line 1235 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCIE3C\_\-REG@{OCIE3C\_\-REG}}
\index{OCIE3C\_\-REG@{OCIE3C\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCIE3C\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCIE3C\_\-REG~TIMSK3}\label{ATmega32U6_8h_c8b002a9bbf13694ccfc11c413db57f0}




Definition at line 1236 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR0B\_\-0\_\-REG@{OCR0B\_\-0\_\-REG}}
\index{OCR0B\_\-0\_\-REG@{OCR0B\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR0B\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR0B\_\-0\_\-REG~OCR0B}\label{ATmega32U6_8h_dffda4379dedcd1ffadfd0ace8b69bc4}




Definition at line 203 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR0B\_\-1\_\-REG@{OCR0B\_\-1\_\-REG}}
\index{OCR0B\_\-1\_\-REG@{OCR0B\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR0B\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR0B\_\-1\_\-REG~OCR0B}\label{ATmega32U6_8h_fa29e6d062c6a4441612bd73e3d6bed7}




Definition at line 204 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR0B\_\-2\_\-REG@{OCR0B\_\-2\_\-REG}}
\index{OCR0B\_\-2\_\-REG@{OCR0B\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR0B\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR0B\_\-2\_\-REG~OCR0B}\label{ATmega32U6_8h_cb50b6e5d6e1634ad8dcf30bcb05ac20}




Definition at line 205 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR0B\_\-3\_\-REG@{OCR0B\_\-3\_\-REG}}
\index{OCR0B\_\-3\_\-REG@{OCR0B\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR0B\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR0B\_\-3\_\-REG~OCR0B}\label{ATmega32U6_8h_f3d7d773d1878e8007486e6bd0aabe1d}




Definition at line 206 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR0B\_\-4\_\-REG@{OCR0B\_\-4\_\-REG}}
\index{OCR0B\_\-4\_\-REG@{OCR0B\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR0B\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR0B\_\-4\_\-REG~OCR0B}\label{ATmega32U6_8h_ad83e5bb728b29366afb0a6c434bcbea}




Definition at line 207 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR0B\_\-5\_\-REG@{OCR0B\_\-5\_\-REG}}
\index{OCR0B\_\-5\_\-REG@{OCR0B\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR0B\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR0B\_\-5\_\-REG~OCR0B}\label{ATmega32U6_8h_26408bb6277eb92e3cbac1c16b720784}




Definition at line 208 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR0B\_\-6\_\-REG@{OCR0B\_\-6\_\-REG}}
\index{OCR0B\_\-6\_\-REG@{OCR0B\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR0B\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR0B\_\-6\_\-REG~OCR0B}\label{ATmega32U6_8h_2f2a495c27bd43e1d24ef5c8d2fd0beb}




Definition at line 209 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR0B\_\-7\_\-REG@{OCR0B\_\-7\_\-REG}}
\index{OCR0B\_\-7\_\-REG@{OCR0B\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR0B\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR0B\_\-7\_\-REG~OCR0B}\label{ATmega32U6_8h_4adb09e4ffe8f1246e922ef016ff0387}




Definition at line 210 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AH0\_\-REG@{OCR1AH0\_\-REG}}
\index{OCR1AH0\_\-REG@{OCR1AH0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AH0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AH0\_\-REG~OCR1AH}\label{ATmega32U6_8h_76cffc78592a8684b6ad766495c67b97}




Definition at line 1345 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AH1\_\-REG@{OCR1AH1\_\-REG}}
\index{OCR1AH1\_\-REG@{OCR1AH1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AH1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AH1\_\-REG~OCR1AH}\label{ATmega32U6_8h_6ff71710a669c3a301f09038c2656ffc}




Definition at line 1346 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AH2\_\-REG@{OCR1AH2\_\-REG}}
\index{OCR1AH2\_\-REG@{OCR1AH2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AH2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AH2\_\-REG~OCR1AH}\label{ATmega32U6_8h_664d0221d7d1b04e8de8a7c0a570d72a}




Definition at line 1347 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AH3\_\-REG@{OCR1AH3\_\-REG}}
\index{OCR1AH3\_\-REG@{OCR1AH3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AH3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AH3\_\-REG~OCR1AH}\label{ATmega32U6_8h_9ae7117bbdff1b73881565ffa935d23c}




Definition at line 1348 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AH4\_\-REG@{OCR1AH4\_\-REG}}
\index{OCR1AH4\_\-REG@{OCR1AH4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AH4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AH4\_\-REG~OCR1AH}\label{ATmega32U6_8h_8b9575a62855f2b00b42c86d2b8fe219}




Definition at line 1349 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AH5\_\-REG@{OCR1AH5\_\-REG}}
\index{OCR1AH5\_\-REG@{OCR1AH5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AH5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AH5\_\-REG~OCR1AH}\label{ATmega32U6_8h_86de588f6310ed6535f319930d6b8769}




Definition at line 1350 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AH6\_\-REG@{OCR1AH6\_\-REG}}
\index{OCR1AH6\_\-REG@{OCR1AH6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AH6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AH6\_\-REG~OCR1AH}\label{ATmega32U6_8h_de644871a6cf22e4afa55e62d129c76d}




Definition at line 1351 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AH7\_\-REG@{OCR1AH7\_\-REG}}
\index{OCR1AH7\_\-REG@{OCR1AH7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AH7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AH7\_\-REG~OCR1AH}\label{ATmega32U6_8h_9175672c5137d382cb7caf6f420dcb95}




Definition at line 1352 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AL0\_\-REG@{OCR1AL0\_\-REG}}
\index{OCR1AL0\_\-REG@{OCR1AL0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AL0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AL0\_\-REG~OCR1AL}\label{ATmega32U6_8h_b7156a04d6b271949b7089575b073e77}




Definition at line 1355 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AL1\_\-REG@{OCR1AL1\_\-REG}}
\index{OCR1AL1\_\-REG@{OCR1AL1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AL1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AL1\_\-REG~OCR1AL}\label{ATmega32U6_8h_804cba0f39f492d7288da3e1f6493b10}




Definition at line 1356 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AL2\_\-REG@{OCR1AL2\_\-REG}}
\index{OCR1AL2\_\-REG@{OCR1AL2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AL2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AL2\_\-REG~OCR1AL}\label{ATmega32U6_8h_602b5d751df6f8a1ce0f5884c8b2d5bf}




Definition at line 1357 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AL3\_\-REG@{OCR1AL3\_\-REG}}
\index{OCR1AL3\_\-REG@{OCR1AL3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AL3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AL3\_\-REG~OCR1AL}\label{ATmega32U6_8h_c9878f7beec4913a6b24ec1e7508808b}




Definition at line 1358 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AL4\_\-REG@{OCR1AL4\_\-REG}}
\index{OCR1AL4\_\-REG@{OCR1AL4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AL4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AL4\_\-REG~OCR1AL}\label{ATmega32U6_8h_9be063575a85da6c6db243a5b6ac5206}




Definition at line 1359 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AL5\_\-REG@{OCR1AL5\_\-REG}}
\index{OCR1AL5\_\-REG@{OCR1AL5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AL5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AL5\_\-REG~OCR1AL}\label{ATmega32U6_8h_e36d5d702dbe5b043976c0000b45ae68}




Definition at line 1360 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AL6\_\-REG@{OCR1AL6\_\-REG}}
\index{OCR1AL6\_\-REG@{OCR1AL6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AL6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AL6\_\-REG~OCR1AL}\label{ATmega32U6_8h_9f0194a166ce44212f4d6440922e59c9}




Definition at line 1361 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1AL7\_\-REG@{OCR1AL7\_\-REG}}
\index{OCR1AL7\_\-REG@{OCR1AL7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1AL7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1AL7\_\-REG~OCR1AL}\label{ATmega32U6_8h_0de9246b2f818d409d6993151145fc2a}




Definition at line 1362 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BH0\_\-REG@{OCR1BH0\_\-REG}}
\index{OCR1BH0\_\-REG@{OCR1BH0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BH0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BH0\_\-REG~OCR1BH}\label{ATmega32U6_8h_90791a27ce9aa3fcea198f2ec16cfa64}




Definition at line 807 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BH1\_\-REG@{OCR1BH1\_\-REG}}
\index{OCR1BH1\_\-REG@{OCR1BH1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BH1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BH1\_\-REG~OCR1BH}\label{ATmega32U6_8h_9e03ced9340990fe7ecd3423dae31980}




Definition at line 808 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BH2\_\-REG@{OCR1BH2\_\-REG}}
\index{OCR1BH2\_\-REG@{OCR1BH2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BH2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BH2\_\-REG~OCR1BH}\label{ATmega32U6_8h_6ac61e2e86fc965f95f7644738e61eca}




Definition at line 809 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BH3\_\-REG@{OCR1BH3\_\-REG}}
\index{OCR1BH3\_\-REG@{OCR1BH3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BH3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BH3\_\-REG~OCR1BH}\label{ATmega32U6_8h_55ad741d2c801dc9017fa2c2ad823d2a}




Definition at line 810 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BH4\_\-REG@{OCR1BH4\_\-REG}}
\index{OCR1BH4\_\-REG@{OCR1BH4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BH4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BH4\_\-REG~OCR1BH}\label{ATmega32U6_8h_8930d72ff1f6f17838f77a46a49b7a79}




Definition at line 811 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BH5\_\-REG@{OCR1BH5\_\-REG}}
\index{OCR1BH5\_\-REG@{OCR1BH5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BH5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BH5\_\-REG~OCR1BH}\label{ATmega32U6_8h_56b20d68d95b42a236d43ddf4dcd1347}




Definition at line 812 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BH6\_\-REG@{OCR1BH6\_\-REG}}
\index{OCR1BH6\_\-REG@{OCR1BH6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BH6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BH6\_\-REG~OCR1BH}\label{ATmega32U6_8h_ed6a5892547bd6b908c7f9928d3af230}




Definition at line 813 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BH7\_\-REG@{OCR1BH7\_\-REG}}
\index{OCR1BH7\_\-REG@{OCR1BH7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BH7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BH7\_\-REG~OCR1BH}\label{ATmega32U6_8h_45247e9966bc2f27f882f06bf698fe1c}




Definition at line 814 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BL0\_\-REG@{OCR1BL0\_\-REG}}
\index{OCR1BL0\_\-REG@{OCR1BL0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BL0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BL0\_\-REG~OCR1BL}\label{ATmega32U6_8h_6ad4667f6c5c346e18da3e0c00b6bbc1}




Definition at line 787 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BL1\_\-REG@{OCR1BL1\_\-REG}}
\index{OCR1BL1\_\-REG@{OCR1BL1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BL1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BL1\_\-REG~OCR1BL}\label{ATmega32U6_8h_4274b00fe5273b7ea53619bd50482c1c}




Definition at line 788 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BL2\_\-REG@{OCR1BL2\_\-REG}}
\index{OCR1BL2\_\-REG@{OCR1BL2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BL2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BL2\_\-REG~OCR1BL}\label{ATmega32U6_8h_02f1190659700630c6df9ab5097f389b}




Definition at line 789 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BL3\_\-REG@{OCR1BL3\_\-REG}}
\index{OCR1BL3\_\-REG@{OCR1BL3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BL3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BL3\_\-REG~OCR1BL}\label{ATmega32U6_8h_6b78c083255a72d7d27a2e0c7914b2dc}




Definition at line 790 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BL4\_\-REG@{OCR1BL4\_\-REG}}
\index{OCR1BL4\_\-REG@{OCR1BL4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BL4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BL4\_\-REG~OCR1BL}\label{ATmega32U6_8h_73a707d5eb50faa3982813f045b41bfe}




Definition at line 791 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BL5\_\-REG@{OCR1BL5\_\-REG}}
\index{OCR1BL5\_\-REG@{OCR1BL5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BL5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BL5\_\-REG~OCR1BL}\label{ATmega32U6_8h_be97392680683ca730835f616bf2fc32}




Definition at line 792 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BL6\_\-REG@{OCR1BL6\_\-REG}}
\index{OCR1BL6\_\-REG@{OCR1BL6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BL6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BL6\_\-REG~OCR1BL}\label{ATmega32U6_8h_df48e8bc5fc4ec622c28b7b32a50bbae}




Definition at line 793 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1BL7\_\-REG@{OCR1BL7\_\-REG}}
\index{OCR1BL7\_\-REG@{OCR1BL7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1BL7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1BL7\_\-REG~OCR1BL}\label{ATmega32U6_8h_69b15121693bfb5afe29134091766be3}




Definition at line 794 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CH0\_\-REG@{OCR1CH0\_\-REG}}
\index{OCR1CH0\_\-REG@{OCR1CH0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CH0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CH0\_\-REG~OCR1CH}\label{ATmega32U6_8h_9150e2d434ad2292aae18e76289939f7}




Definition at line 935 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CH1\_\-REG@{OCR1CH1\_\-REG}}
\index{OCR1CH1\_\-REG@{OCR1CH1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CH1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CH1\_\-REG~OCR1CH}\label{ATmega32U6_8h_cfbbc0221f2908fddc980cf2761ce9c9}




Definition at line 936 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CH2\_\-REG@{OCR1CH2\_\-REG}}
\index{OCR1CH2\_\-REG@{OCR1CH2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CH2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CH2\_\-REG~OCR1CH}\label{ATmega32U6_8h_adfbf4e4669363dda68be5638d026853}




Definition at line 937 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CH3\_\-REG@{OCR1CH3\_\-REG}}
\index{OCR1CH3\_\-REG@{OCR1CH3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CH3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CH3\_\-REG~OCR1CH}\label{ATmega32U6_8h_14a13033ab66e363d5851d2482f75f74}




Definition at line 938 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CH4\_\-REG@{OCR1CH4\_\-REG}}
\index{OCR1CH4\_\-REG@{OCR1CH4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CH4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CH4\_\-REG~OCR1CH}\label{ATmega32U6_8h_eb59b75a6b0c6c5217979ebc74e6f52e}




Definition at line 939 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CH5\_\-REG@{OCR1CH5\_\-REG}}
\index{OCR1CH5\_\-REG@{OCR1CH5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CH5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CH5\_\-REG~OCR1CH}\label{ATmega32U6_8h_d405330c39a33f323e181a85e150d9ad}




Definition at line 940 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CH6\_\-REG@{OCR1CH6\_\-REG}}
\index{OCR1CH6\_\-REG@{OCR1CH6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CH6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CH6\_\-REG~OCR1CH}\label{ATmega32U6_8h_4a1e41b8604a7008dbb2ff6a2636e8ff}




Definition at line 941 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CH7\_\-REG@{OCR1CH7\_\-REG}}
\index{OCR1CH7\_\-REG@{OCR1CH7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CH7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CH7\_\-REG~OCR1CH}\label{ATmega32U6_8h_8d1c88a414a4f6caea8cc6283c62f6f4}




Definition at line 942 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CL0\_\-REG@{OCR1CL0\_\-REG}}
\index{OCR1CL0\_\-REG@{OCR1CL0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CL0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CL0\_\-REG~OCR1CL}\label{ATmega32U6_8h_f9002bb91c6ca1cac93b0ae9a6d23178}




Definition at line 925 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CL1\_\-REG@{OCR1CL1\_\-REG}}
\index{OCR1CL1\_\-REG@{OCR1CL1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CL1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CL1\_\-REG~OCR1CL}\label{ATmega32U6_8h_f1c1ad29e0ba9e26c605cf3f226e1786}




Definition at line 926 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CL2\_\-REG@{OCR1CL2\_\-REG}}
\index{OCR1CL2\_\-REG@{OCR1CL2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CL2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CL2\_\-REG~OCR1CL}\label{ATmega32U6_8h_4937a2179a8b665842900e9eff2f5c5b}




Definition at line 927 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CL3\_\-REG@{OCR1CL3\_\-REG}}
\index{OCR1CL3\_\-REG@{OCR1CL3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CL3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CL3\_\-REG~OCR1CL}\label{ATmega32U6_8h_4cec3e3982508f1560298e8639981218}




Definition at line 928 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CL4\_\-REG@{OCR1CL4\_\-REG}}
\index{OCR1CL4\_\-REG@{OCR1CL4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CL4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CL4\_\-REG~OCR1CL}\label{ATmega32U6_8h_83ec4ea22dd75f35502b5b4bc26cc909}




Definition at line 929 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CL5\_\-REG@{OCR1CL5\_\-REG}}
\index{OCR1CL5\_\-REG@{OCR1CL5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CL5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CL5\_\-REG~OCR1CL}\label{ATmega32U6_8h_20683b1700ea29dbd82e156daec7a125}




Definition at line 930 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CL6\_\-REG@{OCR1CL6\_\-REG}}
\index{OCR1CL6\_\-REG@{OCR1CL6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CL6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CL6\_\-REG~OCR1CL}\label{ATmega32U6_8h_ef1095a081b66525690f05a0c3dadb2e}




Definition at line 931 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR1CL7\_\-REG@{OCR1CL7\_\-REG}}
\index{OCR1CL7\_\-REG@{OCR1CL7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR1CL7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR1CL7\_\-REG~OCR1CL}\label{ATmega32U6_8h_392ca0d050f6981e6cdcb69158a85c00}




Definition at line 932 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2A\_\-0\_\-REG@{OCR2A\_\-0\_\-REG}}
\index{OCR2A\_\-0\_\-REG@{OCR2A\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2A\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2A\_\-0\_\-REG~OCR2A}\label{ATmega32U6_8h_811fa3556f6085e038480c1cf783f0c1}




Definition at line 248 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2A\_\-1\_\-REG@{OCR2A\_\-1\_\-REG}}
\index{OCR2A\_\-1\_\-REG@{OCR2A\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2A\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2A\_\-1\_\-REG~OCR2A}\label{ATmega32U6_8h_082b20b8d1338fb538a6b683bd7a3bd3}




Definition at line 249 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2A\_\-2\_\-REG@{OCR2A\_\-2\_\-REG}}
\index{OCR2A\_\-2\_\-REG@{OCR2A\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2A\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2A\_\-2\_\-REG~OCR2A}\label{ATmega32U6_8h_e66aff5b306cd9fd2c58dba30c5014bc}




Definition at line 250 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2A\_\-3\_\-REG@{OCR2A\_\-3\_\-REG}}
\index{OCR2A\_\-3\_\-REG@{OCR2A\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2A\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2A\_\-3\_\-REG~OCR2A}\label{ATmega32U6_8h_3eae09bec69ccafc0901f40f298a8e4c}




Definition at line 251 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2A\_\-4\_\-REG@{OCR2A\_\-4\_\-REG}}
\index{OCR2A\_\-4\_\-REG@{OCR2A\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2A\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2A\_\-4\_\-REG~OCR2A}\label{ATmega32U6_8h_da49a80d49395a8908cf4270a37036f1}




Definition at line 252 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2A\_\-5\_\-REG@{OCR2A\_\-5\_\-REG}}
\index{OCR2A\_\-5\_\-REG@{OCR2A\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2A\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2A\_\-5\_\-REG~OCR2A}\label{ATmega32U6_8h_fc5ef0bc558ec14cddf8492c79239ea9}




Definition at line 253 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2A\_\-6\_\-REG@{OCR2A\_\-6\_\-REG}}
\index{OCR2A\_\-6\_\-REG@{OCR2A\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2A\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2A\_\-6\_\-REG~OCR2A}\label{ATmega32U6_8h_845f84c7db760a1834c3b210fb98f722}




Definition at line 254 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2A\_\-7\_\-REG@{OCR2A\_\-7\_\-REG}}
\index{OCR2A\_\-7\_\-REG@{OCR2A\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2A\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2A\_\-7\_\-REG~OCR2A}\label{ATmega32U6_8h_bcf8807d249830f8b76ac66920a4ef1f}




Definition at line 255 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2AUB\_\-REG@{OCR2AUB\_\-REG}}
\index{OCR2AUB\_\-REG@{OCR2AUB\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2AUB\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2AUB\_\-REG~ASSR}\label{ATmega32U6_8h_39256ff4454ce6d4b8fd4ec17a76e046}




Definition at line 444 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2B\_\-0\_\-REG@{OCR2B\_\-0\_\-REG}}
\index{OCR2B\_\-0\_\-REG@{OCR2B\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2B\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2B\_\-0\_\-REG~OCR2B}\label{ATmega32U6_8h_b4a284d82d7ec0b04a773355e592eea1}




Definition at line 238 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2B\_\-1\_\-REG@{OCR2B\_\-1\_\-REG}}
\index{OCR2B\_\-1\_\-REG@{OCR2B\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2B\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2B\_\-1\_\-REG~OCR2B}\label{ATmega32U6_8h_10883982b62d929eb97c01604c5b1439}




Definition at line 239 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2B\_\-2\_\-REG@{OCR2B\_\-2\_\-REG}}
\index{OCR2B\_\-2\_\-REG@{OCR2B\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2B\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2B\_\-2\_\-REG~OCR2B}\label{ATmega32U6_8h_752693f669a9f9155deb3ce1c1308e59}




Definition at line 240 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2B\_\-3\_\-REG@{OCR2B\_\-3\_\-REG}}
\index{OCR2B\_\-3\_\-REG@{OCR2B\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2B\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2B\_\-3\_\-REG~OCR2B}\label{ATmega32U6_8h_35f3c8f4d427085d41eae9909afdc993}




Definition at line 241 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2B\_\-4\_\-REG@{OCR2B\_\-4\_\-REG}}
\index{OCR2B\_\-4\_\-REG@{OCR2B\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2B\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2B\_\-4\_\-REG~OCR2B}\label{ATmega32U6_8h_f8399e698666d2be9f8cc45049e44406}




Definition at line 242 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2B\_\-5\_\-REG@{OCR2B\_\-5\_\-REG}}
\index{OCR2B\_\-5\_\-REG@{OCR2B\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2B\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2B\_\-5\_\-REG~OCR2B}\label{ATmega32U6_8h_c910e7675c070bb28bb19507c51f27ac}




Definition at line 243 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2B\_\-6\_\-REG@{OCR2B\_\-6\_\-REG}}
\index{OCR2B\_\-6\_\-REG@{OCR2B\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2B\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2B\_\-6\_\-REG~OCR2B}\label{ATmega32U6_8h_7a571e424d674dfd9d2231fe33d1e64f}




Definition at line 244 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2B\_\-7\_\-REG@{OCR2B\_\-7\_\-REG}}
\index{OCR2B\_\-7\_\-REG@{OCR2B\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2B\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2B\_\-7\_\-REG~OCR2B}\label{ATmega32U6_8h_a2c59988fdaadc6c323c84bc7d40dde6}




Definition at line 245 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR2BUB\_\-REG@{OCR2BUB\_\-REG}}
\index{OCR2BUB\_\-REG@{OCR2BUB\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR2BUB\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR2BUB\_\-REG~ASSR}\label{ATmega32U6_8h_b44666b3ea63acdfb4a686cb56d57b3c}




Definition at line 443 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AH0\_\-REG@{OCR3AH0\_\-REG}}
\index{OCR3AH0\_\-REG@{OCR3AH0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AH0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AH0\_\-REG~OCR3AH}\label{ATmega32U6_8h_fca254eefdcdb56ee4474c58cce3cf96}




Definition at line 522 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AH1\_\-REG@{OCR3AH1\_\-REG}}
\index{OCR3AH1\_\-REG@{OCR3AH1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AH1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AH1\_\-REG~OCR3AH}\label{ATmega32U6_8h_d432eecb24b478dcb724ca3269a53a62}




Definition at line 523 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AH2\_\-REG@{OCR3AH2\_\-REG}}
\index{OCR3AH2\_\-REG@{OCR3AH2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AH2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AH2\_\-REG~OCR3AH}\label{ATmega32U6_8h_b5b35dc67ebe9bbfa2a9f36736c70e24}




Definition at line 524 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AH3\_\-REG@{OCR3AH3\_\-REG}}
\index{OCR3AH3\_\-REG@{OCR3AH3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AH3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AH3\_\-REG~OCR3AH}\label{ATmega32U6_8h_7abfc4a8ba42ec71982b8170af68477e}




Definition at line 525 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AH4\_\-REG@{OCR3AH4\_\-REG}}
\index{OCR3AH4\_\-REG@{OCR3AH4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AH4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AH4\_\-REG~OCR3AH}\label{ATmega32U6_8h_1d15725e2a7f5c9862a51edb240f4d15}




Definition at line 526 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AH5\_\-REG@{OCR3AH5\_\-REG}}
\index{OCR3AH5\_\-REG@{OCR3AH5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AH5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AH5\_\-REG~OCR3AH}\label{ATmega32U6_8h_8aa9e21e81998d6e80edc5ba0071986c}




Definition at line 527 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AH6\_\-REG@{OCR3AH6\_\-REG}}
\index{OCR3AH6\_\-REG@{OCR3AH6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AH6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AH6\_\-REG~OCR3AH}\label{ATmega32U6_8h_9cf5b56d28c8572db0c54508f6523027}




Definition at line 528 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AH7\_\-REG@{OCR3AH7\_\-REG}}
\index{OCR3AH7\_\-REG@{OCR3AH7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AH7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AH7\_\-REG~OCR3AH}\label{ATmega32U6_8h_d7e2dfb0909330f3b40b55d902b689fa}




Definition at line 529 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AL0\_\-REG@{OCR3AL0\_\-REG}}
\index{OCR3AL0\_\-REG@{OCR3AL0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AL0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AL0\_\-REG~OCR3AL}\label{ATmega32U6_8h_7572ce7fa5f83409a0603afe7594eebe}




Definition at line 492 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AL1\_\-REG@{OCR3AL1\_\-REG}}
\index{OCR3AL1\_\-REG@{OCR3AL1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AL1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AL1\_\-REG~OCR3AL}\label{ATmega32U6_8h_843b290dbc5bbc670813795d2cbcb64f}




Definition at line 493 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AL2\_\-REG@{OCR3AL2\_\-REG}}
\index{OCR3AL2\_\-REG@{OCR3AL2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AL2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AL2\_\-REG~OCR3AL}\label{ATmega32U6_8h_5f4819bfeaec6bd4229e1683f389ec4f}




Definition at line 494 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AL3\_\-REG@{OCR3AL3\_\-REG}}
\index{OCR3AL3\_\-REG@{OCR3AL3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AL3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AL3\_\-REG~OCR3AL}\label{ATmega32U6_8h_ef99f8ea74468785e7318f2a20de2ecc}




Definition at line 495 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AL4\_\-REG@{OCR3AL4\_\-REG}}
\index{OCR3AL4\_\-REG@{OCR3AL4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AL4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AL4\_\-REG~OCR3AL}\label{ATmega32U6_8h_7040593c635a9fd9c7d474ac571f7bc3}




Definition at line 496 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AL5\_\-REG@{OCR3AL5\_\-REG}}
\index{OCR3AL5\_\-REG@{OCR3AL5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AL5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AL5\_\-REG~OCR3AL}\label{ATmega32U6_8h_f6ebf8dd30bce061249ceaa5156c995f}




Definition at line 497 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AL6\_\-REG@{OCR3AL6\_\-REG}}
\index{OCR3AL6\_\-REG@{OCR3AL6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AL6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AL6\_\-REG~OCR3AL}\label{ATmega32U6_8h_122d40ad35a6688ed17b917b165374b5}




Definition at line 498 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3AL7\_\-REG@{OCR3AL7\_\-REG}}
\index{OCR3AL7\_\-REG@{OCR3AL7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3AL7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3AL7\_\-REG~OCR3AL}\label{ATmega32U6_8h_41060b65ba3730c1ab7286ecf59ce039}




Definition at line 499 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BH0\_\-REG@{OCR3BH0\_\-REG}}
\index{OCR3BH0\_\-REG@{OCR3BH0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BH0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BH0\_\-REG~OCR3BH}\label{ATmega32U6_8h_4b240d62e0ba983acf250c0438944d9b}




Definition at line 1218 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BH1\_\-REG@{OCR3BH1\_\-REG}}
\index{OCR3BH1\_\-REG@{OCR3BH1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BH1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BH1\_\-REG~OCR3BH}\label{ATmega32U6_8h_6fd6f3aa095c7b1c6f6e9ff007e424c3}




Definition at line 1219 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BH2\_\-REG@{OCR3BH2\_\-REG}}
\index{OCR3BH2\_\-REG@{OCR3BH2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BH2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BH2\_\-REG~OCR3BH}\label{ATmega32U6_8h_12c9f8e2970ac49b30a251fed982797b}




Definition at line 1220 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BH3\_\-REG@{OCR3BH3\_\-REG}}
\index{OCR3BH3\_\-REG@{OCR3BH3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BH3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BH3\_\-REG~OCR3BH}\label{ATmega32U6_8h_5c106c712f3736a1d2cb420e30c84e29}




Definition at line 1221 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BH4\_\-REG@{OCR3BH4\_\-REG}}
\index{OCR3BH4\_\-REG@{OCR3BH4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BH4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BH4\_\-REG~OCR3BH}\label{ATmega32U6_8h_8c234c741d76c78e0f7abbb9d1d4e427}




Definition at line 1222 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BH5\_\-REG@{OCR3BH5\_\-REG}}
\index{OCR3BH5\_\-REG@{OCR3BH5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BH5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BH5\_\-REG~OCR3BH}\label{ATmega32U6_8h_491efa50b510df3678bd6d5dcf0e8523}




Definition at line 1223 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BH6\_\-REG@{OCR3BH6\_\-REG}}
\index{OCR3BH6\_\-REG@{OCR3BH6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BH6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BH6\_\-REG~OCR3BH}\label{ATmega32U6_8h_8e61408b0a4887be83f9122874c9267c}




Definition at line 1224 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BH7\_\-REG@{OCR3BH7\_\-REG}}
\index{OCR3BH7\_\-REG@{OCR3BH7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BH7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BH7\_\-REG~OCR3BH}\label{ATmega32U6_8h_533834b2ae5abbad5b3040369ac99642}




Definition at line 1225 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BL0\_\-REG@{OCR3BL0\_\-REG}}
\index{OCR3BL0\_\-REG@{OCR3BL0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BL0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BL0\_\-REG~OCR3BL}\label{ATmega32U6_8h_e291b03ac0fdb667e4b58b5dbc214668}




Definition at line 1208 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BL1\_\-REG@{OCR3BL1\_\-REG}}
\index{OCR3BL1\_\-REG@{OCR3BL1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BL1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BL1\_\-REG~OCR3BL}\label{ATmega32U6_8h_64db18df3a4bb3e1c5107659cd7fd878}




Definition at line 1209 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BL2\_\-REG@{OCR3BL2\_\-REG}}
\index{OCR3BL2\_\-REG@{OCR3BL2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BL2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BL2\_\-REG~OCR3BL}\label{ATmega32U6_8h_45507218e6bfeae61c9586b1733cc434}




Definition at line 1210 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BL3\_\-REG@{OCR3BL3\_\-REG}}
\index{OCR3BL3\_\-REG@{OCR3BL3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BL3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BL3\_\-REG~OCR3BL}\label{ATmega32U6_8h_7006cfdf265e204126cc1d56c8d92b3d}




Definition at line 1211 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BL4\_\-REG@{OCR3BL4\_\-REG}}
\index{OCR3BL4\_\-REG@{OCR3BL4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BL4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BL4\_\-REG~OCR3BL}\label{ATmega32U6_8h_a10c4fc8134fd53faf22c0b8bde3ba0b}




Definition at line 1212 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BL5\_\-REG@{OCR3BL5\_\-REG}}
\index{OCR3BL5\_\-REG@{OCR3BL5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BL5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BL5\_\-REG~OCR3BL}\label{ATmega32U6_8h_2001761448055790d9f57f29c5880611}




Definition at line 1213 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BL6\_\-REG@{OCR3BL6\_\-REG}}
\index{OCR3BL6\_\-REG@{OCR3BL6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BL6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BL6\_\-REG~OCR3BL}\label{ATmega32U6_8h_7ff9d0da9c41a846a2a1fa68d5550ea3}




Definition at line 1214 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3BL7\_\-REG@{OCR3BL7\_\-REG}}
\index{OCR3BL7\_\-REG@{OCR3BL7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3BL7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3BL7\_\-REG~OCR3BL}\label{ATmega32U6_8h_12070f42d80b6ed76deb919f6779c772}




Definition at line 1215 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CH0\_\-REG@{OCR3CH0\_\-REG}}
\index{OCR3CH0\_\-REG@{OCR3CH0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CH0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CH0\_\-REG~OCR3CH}\label{ATmega32U6_8h_8860e33b45f145043340328cff100e9b}




Definition at line 703 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CH1\_\-REG@{OCR3CH1\_\-REG}}
\index{OCR3CH1\_\-REG@{OCR3CH1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CH1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CH1\_\-REG~OCR3CH}\label{ATmega32U6_8h_d1ace47cd9b40ebafdffa3f5d099d19c}




Definition at line 704 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CH2\_\-REG@{OCR3CH2\_\-REG}}
\index{OCR3CH2\_\-REG@{OCR3CH2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CH2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CH2\_\-REG~OCR3CH}\label{ATmega32U6_8h_506b4b4ff6e50dce45ee5f3941f049b4}




Definition at line 705 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CH3\_\-REG@{OCR3CH3\_\-REG}}
\index{OCR3CH3\_\-REG@{OCR3CH3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CH3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CH3\_\-REG~OCR3CH}\label{ATmega32U6_8h_62466266ae7222b90a9a7439a2a8c84e}




Definition at line 706 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CH4\_\-REG@{OCR3CH4\_\-REG}}
\index{OCR3CH4\_\-REG@{OCR3CH4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CH4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CH4\_\-REG~OCR3CH}\label{ATmega32U6_8h_cf8acc33c1931b6bf2a9ece76753227a}




Definition at line 707 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CH5\_\-REG@{OCR3CH5\_\-REG}}
\index{OCR3CH5\_\-REG@{OCR3CH5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CH5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CH5\_\-REG~OCR3CH}\label{ATmega32U6_8h_d700d246239d8972ebdbb49fec8b8f15}




Definition at line 708 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CH6\_\-REG@{OCR3CH6\_\-REG}}
\index{OCR3CH6\_\-REG@{OCR3CH6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CH6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CH6\_\-REG~OCR3CH}\label{ATmega32U6_8h_bc29054116c96c170bc6da94566afd54}




Definition at line 709 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CH7\_\-REG@{OCR3CH7\_\-REG}}
\index{OCR3CH7\_\-REG@{OCR3CH7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CH7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CH7\_\-REG~OCR3CH}\label{ATmega32U6_8h_f2c336acea587a5714a3ddb1014a2931}




Definition at line 710 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CL0\_\-REG@{OCR3CL0\_\-REG}}
\index{OCR3CL0\_\-REG@{OCR3CL0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CL0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CL0\_\-REG~OCR3CL}\label{ATmega32U6_8h_bcfa46451d77eeb52b703e09ef1b9a63}




Definition at line 718 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CL1\_\-REG@{OCR3CL1\_\-REG}}
\index{OCR3CL1\_\-REG@{OCR3CL1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CL1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CL1\_\-REG~OCR3CL}\label{ATmega32U6_8h_c43d7cee91858b1c0866f98b8ac50637}




Definition at line 719 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CL2\_\-REG@{OCR3CL2\_\-REG}}
\index{OCR3CL2\_\-REG@{OCR3CL2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CL2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CL2\_\-REG~OCR3CL}\label{ATmega32U6_8h_a54ff9f18f940ce1505f22eb5133a705}




Definition at line 720 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CL3\_\-REG@{OCR3CL3\_\-REG}}
\index{OCR3CL3\_\-REG@{OCR3CL3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CL3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CL3\_\-REG~OCR3CL}\label{ATmega32U6_8h_76892c5dca18963ee931897e98a9612c}




Definition at line 721 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CL4\_\-REG@{OCR3CL4\_\-REG}}
\index{OCR3CL4\_\-REG@{OCR3CL4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CL4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CL4\_\-REG~OCR3CL}\label{ATmega32U6_8h_fe0e7413fd2f32f60b3a6e9b2fe202ca}




Definition at line 722 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CL5\_\-REG@{OCR3CL5\_\-REG}}
\index{OCR3CL5\_\-REG@{OCR3CL5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CL5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CL5\_\-REG~OCR3CL}\label{ATmega32U6_8h_3b26bb82bfa0c1d6fa7ad5d428923cd4}




Definition at line 723 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CL6\_\-REG@{OCR3CL6\_\-REG}}
\index{OCR3CL6\_\-REG@{OCR3CL6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CL6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CL6\_\-REG~OCR3CL}\label{ATmega32U6_8h_e01848faac7eb69fdbb1094eb9204eb2}




Definition at line 724 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCR3CL7\_\-REG@{OCR3CL7\_\-REG}}
\index{OCR3CL7\_\-REG@{OCR3CL7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCR3CL7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCR3CL7\_\-REG~OCR3CL}\label{ATmega32U6_8h_4b939c44e96803dfccb148f97c1cfcb4}




Definition at line 725 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCROA\_\-0\_\-REG@{OCROA\_\-0\_\-REG}}
\index{OCROA\_\-0\_\-REG@{OCROA\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCROA\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCROA\_\-0\_\-REG~OCR0A}\label{ATmega32U6_8h_de61e0f226e0e17d928fadc4c9208ee8}




Definition at line 1084 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCROA\_\-1\_\-REG@{OCROA\_\-1\_\-REG}}
\index{OCROA\_\-1\_\-REG@{OCROA\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCROA\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCROA\_\-1\_\-REG~OCR0A}\label{ATmega32U6_8h_0f18f17be9dd5aad7078a7402d6b8e4a}




Definition at line 1085 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCROA\_\-2\_\-REG@{OCROA\_\-2\_\-REG}}
\index{OCROA\_\-2\_\-REG@{OCROA\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCROA\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCROA\_\-2\_\-REG~OCR0A}\label{ATmega32U6_8h_374100904301c5ca9d0f844935b69683}




Definition at line 1086 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCROA\_\-3\_\-REG@{OCROA\_\-3\_\-REG}}
\index{OCROA\_\-3\_\-REG@{OCROA\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCROA\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCROA\_\-3\_\-REG~OCR0A}\label{ATmega32U6_8h_f1347d4eb4f27d7e5fd608e2ca8756a6}




Definition at line 1087 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCROA\_\-4\_\-REG@{OCROA\_\-4\_\-REG}}
\index{OCROA\_\-4\_\-REG@{OCROA\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCROA\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCROA\_\-4\_\-REG~OCR0A}\label{ATmega32U6_8h_91a71c85044238ff1e10ab91a3c8da25}




Definition at line 1088 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCROA\_\-5\_\-REG@{OCROA\_\-5\_\-REG}}
\index{OCROA\_\-5\_\-REG@{OCROA\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCROA\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCROA\_\-5\_\-REG~OCR0A}\label{ATmega32U6_8h_82910ff2d3fa0aa4bf06ba8e7333a5c4}




Definition at line 1089 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCROA\_\-6\_\-REG@{OCROA\_\-6\_\-REG}}
\index{OCROA\_\-6\_\-REG@{OCROA\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCROA\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCROA\_\-6\_\-REG~OCR0A}\label{ATmega32U6_8h_871f8ff01431be78b27b841191919a42}




Definition at line 1090 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OCROA\_\-7\_\-REG@{OCROA\_\-7\_\-REG}}
\index{OCROA\_\-7\_\-REG@{OCROA\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OCROA\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OCROA\_\-7\_\-REG~OCR0A}\label{ATmega32U6_8h_084f383c49f152a112253302a42274f1}




Definition at line 1091 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OTGPADE\_\-REG@{OTGPADE\_\-REG}}
\index{OTGPADE\_\-REG@{OTGPADE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OTGPADE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OTGPADE\_\-REG~USBCON}\label{ATmega32U6_8h_119de7fb77e8b558882b328e61b0b620}




Definition at line 839 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!OVERFI\_\-REG@{OVERFI\_\-REG}}
\index{OVERFI\_\-REG@{OVERFI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[OVERFI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define OVERFI\_\-REG~UESTA0X}\label{ATmega32U6_8h_fb46fb6c3566c4a982f1c83ea19753ea}




Definition at line 1174 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PCIE0\_\-REG@{PCIE0\_\-REG}}
\index{PCIE0\_\-REG@{PCIE0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PCIE0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PCIE0\_\-REG~PCICR}\label{ATmega32U6_8h_cc36a3d829c10e1ba4aa71009041b1f1}




Definition at line 596 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PCIF0\_\-REG@{PCIF0\_\-REG}}
\index{PCIF0\_\-REG@{PCIF0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PCIF0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PCIF0\_\-REG~PCIFR}\label{ATmega32U6_8h_84ad580ef98d182b06ddfe9266c1ea93}




Definition at line 875 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PCINT0\_\-REG@{PCINT0\_\-REG}}
\index{PCINT0\_\-REG@{PCINT0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PCINT0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PCINT0\_\-REG~PCMSK0}\label{ATmega32U6_8h_1fc8de5bdf89aa2195c98f52d21f7ba1}




Definition at line 1259 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PCINT1\_\-REG@{PCINT1\_\-REG}}
\index{PCINT1\_\-REG@{PCINT1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PCINT1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PCINT1\_\-REG~PCMSK0}\label{ATmega32U6_8h_26779181002e7ea2d1b1671cde829992}




Definition at line 1260 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PCINT2\_\-REG@{PCINT2\_\-REG}}
\index{PCINT2\_\-REG@{PCINT2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PCINT2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PCINT2\_\-REG~PCMSK0}\label{ATmega32U6_8h_44afccf44b76d9f61fa5bab7738f7e99}




Definition at line 1261 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PCINT3\_\-REG@{PCINT3\_\-REG}}
\index{PCINT3\_\-REG@{PCINT3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PCINT3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PCINT3\_\-REG~PCMSK0}\label{ATmega32U6_8h_ad92aed06b38cc34ccb0e3aac10ab4fa}




Definition at line 1262 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PCINT4\_\-REG@{PCINT4\_\-REG}}
\index{PCINT4\_\-REG@{PCINT4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PCINT4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PCINT4\_\-REG~PCMSK0}\label{ATmega32U6_8h_493d06113c3fbb3742899a614534ae01}




Definition at line 1263 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PCINT5\_\-REG@{PCINT5\_\-REG}}
\index{PCINT5\_\-REG@{PCINT5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PCINT5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PCINT5\_\-REG~PCMSK0}\label{ATmega32U6_8h_c297aacfe6169d64a6bf5ab747518b14}




Definition at line 1264 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PCINT6\_\-REG@{PCINT6\_\-REG}}
\index{PCINT6\_\-REG@{PCINT6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PCINT6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PCINT6\_\-REG~PCMSK0}\label{ATmega32U6_8h_1bc3b580d9f16a4a296d306edd493175}




Definition at line 1265 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PCINT7\_\-REG@{PCINT7\_\-REG}}
\index{PCINT7\_\-REG@{PCINT7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PCINT7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PCINT7\_\-REG~PCMSK0}\label{ATmega32U6_8h_328583e3ab557eaaf35c0d1d28c57356}




Definition at line 1266 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PGERS\_\-REG@{PGERS\_\-REG}}
\index{PGERS\_\-REG@{PGERS\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PGERS\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PGERS\_\-REG~SPMCSR}\label{ATmega32U6_8h_82d438bd58be8d9b45211cc6b0448c80}




Definition at line 1160 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PGWRT\_\-REG@{PGWRT\_\-REG}}
\index{PGWRT\_\-REG@{PGWRT\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PGWRT\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PGWRT\_\-REG~SPMCSR}\label{ATmega32U6_8h_baa71acc8944bcb1f49f429b64858848}




Definition at line 1161 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINA0\_\-REG@{PINA0\_\-REG}}
\index{PINA0\_\-REG@{PINA0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINA0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINA0\_\-REG~PINA}\label{ATmega32U6_8h_87349a516bad6c685f2d9ff9bb4ab515}




Definition at line 955 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINA1\_\-REG@{PINA1\_\-REG}}
\index{PINA1\_\-REG@{PINA1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINA1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINA1\_\-REG~PINA}\label{ATmega32U6_8h_bd8ae178cf4ac0a74bc9459af700f983}




Definition at line 956 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINA2\_\-REG@{PINA2\_\-REG}}
\index{PINA2\_\-REG@{PINA2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINA2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINA2\_\-REG~PINA}\label{ATmega32U6_8h_4dbb93d8f28d534ca550384d7f39331d}




Definition at line 957 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINA3\_\-REG@{PINA3\_\-REG}}
\index{PINA3\_\-REG@{PINA3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINA3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINA3\_\-REG~PINA}\label{ATmega32U6_8h_eefe274ba938dcf7469743718b0f36ff}




Definition at line 958 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINA4\_\-REG@{PINA4\_\-REG}}
\index{PINA4\_\-REG@{PINA4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINA4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINA4\_\-REG~PINA}\label{ATmega32U6_8h_459069978dae75fa518d619380b77b95}




Definition at line 959 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINA5\_\-REG@{PINA5\_\-REG}}
\index{PINA5\_\-REG@{PINA5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINA5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINA5\_\-REG~PINA}\label{ATmega32U6_8h_16cb456ecc3f246c1c98f59af4c4f1da}




Definition at line 960 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINA6\_\-REG@{PINA6\_\-REG}}
\index{PINA6\_\-REG@{PINA6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINA6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINA6\_\-REG~PINA}\label{ATmega32U6_8h_a0589540c6bd28b4cf195196a88d6425}




Definition at line 961 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINA7\_\-REG@{PINA7\_\-REG}}
\index{PINA7\_\-REG@{PINA7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINA7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINA7\_\-REG~PINA}\label{ATmega32U6_8h_3f67696541bb9a66c09eb4604a68ad30}




Definition at line 962 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINB0\_\-REG@{PINB0\_\-REG}}
\index{PINB0\_\-REG@{PINB0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINB0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINB0\_\-REG~PINB}\label{ATmega32U6_8h_887fe46ced810578885cd2f9576233fb}




Definition at line 1295 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINB1\_\-REG@{PINB1\_\-REG}}
\index{PINB1\_\-REG@{PINB1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINB1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINB1\_\-REG~PINB}\label{ATmega32U6_8h_96950156307fa8076767279ccb521a6d}




Definition at line 1296 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINB2\_\-REG@{PINB2\_\-REG}}
\index{PINB2\_\-REG@{PINB2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINB2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINB2\_\-REG~PINB}\label{ATmega32U6_8h_d5bd17b842b338d4383087c675a3a4f3}




Definition at line 1297 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINB3\_\-REG@{PINB3\_\-REG}}
\index{PINB3\_\-REG@{PINB3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINB3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINB3\_\-REG~PINB}\label{ATmega32U6_8h_f127a9d3187d4d3886ec120fa904d239}




Definition at line 1298 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINB4\_\-REG@{PINB4\_\-REG}}
\index{PINB4\_\-REG@{PINB4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINB4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINB4\_\-REG~PINB}\label{ATmega32U6_8h_33bd7788e70872f9c27adc27fd324222}




Definition at line 1299 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINB5\_\-REG@{PINB5\_\-REG}}
\index{PINB5\_\-REG@{PINB5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINB5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINB5\_\-REG~PINB}\label{ATmega32U6_8h_18e2c7ec2497f5b8511ef2ddf50c457f}




Definition at line 1300 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINB6\_\-REG@{PINB6\_\-REG}}
\index{PINB6\_\-REG@{PINB6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINB6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINB6\_\-REG~PINB}\label{ATmega32U6_8h_8f1d15c22912ea93248edbdb38c57613}




Definition at line 1301 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINB7\_\-REG@{PINB7\_\-REG}}
\index{PINB7\_\-REG@{PINB7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINB7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINB7\_\-REG~PINB}\label{ATmega32U6_8h_1d86f584aa520ed5ccb77ce75c9eae18}




Definition at line 1302 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINC0\_\-REG@{PINC0\_\-REG}}
\index{PINC0\_\-REG@{PINC0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINC0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINC0\_\-REG~PINC}\label{ATmega32U6_8h_984887ac1306ffad8619864dbe4aeb6c}




Definition at line 1285 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINC1\_\-REG@{PINC1\_\-REG}}
\index{PINC1\_\-REG@{PINC1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINC1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINC1\_\-REG~PINC}\label{ATmega32U6_8h_82a27fb661bad0dec12bde59dddb2727}




Definition at line 1286 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINC2\_\-REG@{PINC2\_\-REG}}
\index{PINC2\_\-REG@{PINC2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINC2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINC2\_\-REG~PINC}\label{ATmega32U6_8h_78d3466ea7b6947862a9e17470c3066c}




Definition at line 1287 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINC3\_\-REG@{PINC3\_\-REG}}
\index{PINC3\_\-REG@{PINC3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINC3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINC3\_\-REG~PINC}\label{ATmega32U6_8h_eaeffa85d587275a0e7aee361cfbf565}




Definition at line 1288 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINC4\_\-REG@{PINC4\_\-REG}}
\index{PINC4\_\-REG@{PINC4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINC4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINC4\_\-REG~PINC}\label{ATmega32U6_8h_e192a1c5a73087e8a3e4e3fc9206cbbf}




Definition at line 1289 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINC5\_\-REG@{PINC5\_\-REG}}
\index{PINC5\_\-REG@{PINC5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINC5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINC5\_\-REG~PINC}\label{ATmega32U6_8h_e2a9e6c7635d45c09c344ceba4682b0a}




Definition at line 1290 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINC6\_\-REG@{PINC6\_\-REG}}
\index{PINC6\_\-REG@{PINC6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINC6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINC6\_\-REG~PINC}\label{ATmega32U6_8h_a81df41ca11e7ebea79c80ae0c949f0a}




Definition at line 1291 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINC7\_\-REG@{PINC7\_\-REG}}
\index{PINC7\_\-REG@{PINC7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINC7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINC7\_\-REG~PINC}\label{ATmega32U6_8h_02c0d913157f5c1c513e7eac592b9f02}




Definition at line 1292 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PIND0\_\-REG@{PIND0\_\-REG}}
\index{PIND0\_\-REG@{PIND0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PIND0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PIND0\_\-REG~PIND}\label{ATmega32U6_8h_a609777bfcce6a82df13bce5f936098d}




Definition at line 1335 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PIND1\_\-REG@{PIND1\_\-REG}}
\index{PIND1\_\-REG@{PIND1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PIND1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PIND1\_\-REG~PIND}\label{ATmega32U6_8h_1ad1507c23c6cf423b3025d4a39562d3}




Definition at line 1336 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PIND2\_\-REG@{PIND2\_\-REG}}
\index{PIND2\_\-REG@{PIND2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PIND2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PIND2\_\-REG~PIND}\label{ATmega32U6_8h_1b5c29ef4f69103a73acd4f0447750c7}




Definition at line 1337 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PIND3\_\-REG@{PIND3\_\-REG}}
\index{PIND3\_\-REG@{PIND3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PIND3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PIND3\_\-REG~PIND}\label{ATmega32U6_8h_7d2631f802b2ca028f29cf8cbc4ffaea}




Definition at line 1338 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PIND4\_\-REG@{PIND4\_\-REG}}
\index{PIND4\_\-REG@{PIND4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PIND4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PIND4\_\-REG~PIND}\label{ATmega32U6_8h_9e6b29bab09914583be1a5e87f3424dd}




Definition at line 1339 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PIND5\_\-REG@{PIND5\_\-REG}}
\index{PIND5\_\-REG@{PIND5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PIND5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PIND5\_\-REG~PIND}\label{ATmega32U6_8h_d1dae0888e0366064adc5ed0cf0dcebe}




Definition at line 1340 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PIND6\_\-REG@{PIND6\_\-REG}}
\index{PIND6\_\-REG@{PIND6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PIND6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PIND6\_\-REG~PIND}\label{ATmega32U6_8h_f519b4a06c9e3b294ddfe66f184cf5c0}




Definition at line 1341 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PIND7\_\-REG@{PIND7\_\-REG}}
\index{PIND7\_\-REG@{PIND7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PIND7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PIND7\_\-REG~PIND}\label{ATmega32U6_8h_7fcabd03860b96146470667f8c50bcde}




Definition at line 1342 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINE0\_\-REG@{PINE0\_\-REG}}
\index{PINE0\_\-REG@{PINE0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINE0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINE0\_\-REG~PINE}\label{ATmega32U6_8h_6b213b01ac85ec6dac7d172c98fc07e5}




Definition at line 1325 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINE1\_\-REG@{PINE1\_\-REG}}
\index{PINE1\_\-REG@{PINE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINE1\_\-REG~PINE}\label{ATmega32U6_8h_bc83897e895f2704ca1fe151e9dc6232}




Definition at line 1326 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINE2\_\-REG@{PINE2\_\-REG}}
\index{PINE2\_\-REG@{PINE2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINE2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINE2\_\-REG~PINE}\label{ATmega32U6_8h_0dd398265eb338f8bdba20a037095003}




Definition at line 1327 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINE3\_\-REG@{PINE3\_\-REG}}
\index{PINE3\_\-REG@{PINE3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINE3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINE3\_\-REG~PINE}\label{ATmega32U6_8h_e8e7fe05c9df7a3b5646c9608268c410}




Definition at line 1328 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINE4\_\-REG@{PINE4\_\-REG}}
\index{PINE4\_\-REG@{PINE4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINE4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINE4\_\-REG~PINE}\label{ATmega32U6_8h_16891903cfaf1f930acf9457d93426a0}




Definition at line 1329 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINE5\_\-REG@{PINE5\_\-REG}}
\index{PINE5\_\-REG@{PINE5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINE5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINE5\_\-REG~PINE}\label{ATmega32U6_8h_56aa56d96db6aee45242642f9e6e1b2a}




Definition at line 1330 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINE6\_\-REG@{PINE6\_\-REG}}
\index{PINE6\_\-REG@{PINE6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINE6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINE6\_\-REG~PINE}\label{ATmega32U6_8h_6984f30c53f496bfd8840380241173bd}




Definition at line 1331 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINE7\_\-REG@{PINE7\_\-REG}}
\index{PINE7\_\-REG@{PINE7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINE7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINE7\_\-REG~PINE}\label{ATmega32U6_8h_32c57d13147ecb30cf6bc8fb062e4ebb}




Definition at line 1332 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINF0\_\-REG@{PINF0\_\-REG}}
\index{PINF0\_\-REG@{PINF0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINF0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINF0\_\-REG~PINF}\label{ATmega32U6_8h_88d9296ce3e4b3fded0405bb31cf1c1d}




Definition at line 1315 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINF1\_\-REG@{PINF1\_\-REG}}
\index{PINF1\_\-REG@{PINF1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINF1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINF1\_\-REG~PINF}\label{ATmega32U6_8h_cf19febb6a73e7f98f1fce1f44c3e8f9}




Definition at line 1316 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINF2\_\-REG@{PINF2\_\-REG}}
\index{PINF2\_\-REG@{PINF2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINF2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINF2\_\-REG~PINF}\label{ATmega32U6_8h_1934928251ede26071c642899ad9df53}




Definition at line 1317 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINF3\_\-REG@{PINF3\_\-REG}}
\index{PINF3\_\-REG@{PINF3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINF3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINF3\_\-REG~PINF}\label{ATmega32U6_8h_4d9f07a8e9c7584e6b5e5ed50aeacbad}




Definition at line 1318 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINF4\_\-REG@{PINF4\_\-REG}}
\index{PINF4\_\-REG@{PINF4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINF4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINF4\_\-REG~PINF}\label{ATmega32U6_8h_460a19078c2f988fe126d0c5987382a8}




Definition at line 1319 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINF5\_\-REG@{PINF5\_\-REG}}
\index{PINF5\_\-REG@{PINF5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINF5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINF5\_\-REG~PINF}\label{ATmega32U6_8h_0c621843090bd5e1b694443bd0fd81be}




Definition at line 1320 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINF6\_\-REG@{PINF6\_\-REG}}
\index{PINF6\_\-REG@{PINF6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINF6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINF6\_\-REG~PINF}\label{ATmega32U6_8h_a92c7367b4aea63518a2bf0503e91088}




Definition at line 1321 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PINF7\_\-REG@{PINF7\_\-REG}}
\index{PINF7\_\-REG@{PINF7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PINF7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PINF7\_\-REG~PINF}\label{ATmega32U6_8h_3aee28fcbf255dd54ed075ca715e0847}




Definition at line 1322 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PLLE\_\-REG@{PLLE\_\-REG}}
\index{PLLE\_\-REG@{PLLE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PLLE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PLLE\_\-REG~PLLCSR}\label{ATmega32U6_8h_2b4e023627fda8f9cb907c3a125fdeb3}




Definition at line 1253 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PLLP0\_\-REG@{PLLP0\_\-REG}}
\index{PLLP0\_\-REG@{PLLP0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PLLP0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PLLP0\_\-REG~PLLCSR}\label{ATmega32U6_8h_430a9ebf3a4b2203fa75e3e4bd64b6c2}




Definition at line 1254 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PLLP1\_\-REG@{PLLP1\_\-REG}}
\index{PLLP1\_\-REG@{PLLP1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PLLP1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PLLP1\_\-REG~PLLCSR}\label{ATmega32U6_8h_8ce99f019618e437e80a8a6054859459}




Definition at line 1255 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PLLP2\_\-REG@{PLLP2\_\-REG}}
\index{PLLP2\_\-REG@{PLLP2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PLLP2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PLLP2\_\-REG~PLLCSR}\label{ATmega32U6_8h_e33096c8e373817bdfaf358d833455d7}




Definition at line 1256 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PLOCK\_\-REG@{PLOCK\_\-REG}}
\index{PLOCK\_\-REG@{PLOCK\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PLOCK\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PLOCK\_\-REG~PLLCSR}\label{ATmega32U6_8h_67d2f6fc90e520d71102300ab0776602}




Definition at line 1252 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORF\_\-REG@{PORF\_\-REG}}
\index{PORF\_\-REG@{PORF\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORF\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORF\_\-REG~MCUSR}\label{ATmega32U6_8h_4793c8733c88789e4b47f72f77323fee}




Definition at line 846 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTA0\_\-REG@{PORTA0\_\-REG}}
\index{PORTA0\_\-REG@{PORTA0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTA0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTA0\_\-REG~PORTA}\label{ATmega32U6_8h_475de0053a32e046102c0f210b4e255e}




Definition at line 352 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTA1\_\-REG@{PORTA1\_\-REG}}
\index{PORTA1\_\-REG@{PORTA1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTA1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTA1\_\-REG~PORTA}\label{ATmega32U6_8h_87b55483461028deb8d509268ae94b94}




Definition at line 353 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTA2\_\-REG@{PORTA2\_\-REG}}
\index{PORTA2\_\-REG@{PORTA2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTA2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTA2\_\-REG~PORTA}\label{ATmega32U6_8h_7e25eccb55e4007a78a3bbeaec680868}




Definition at line 354 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTA3\_\-REG@{PORTA3\_\-REG}}
\index{PORTA3\_\-REG@{PORTA3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTA3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTA3\_\-REG~PORTA}\label{ATmega32U6_8h_80ae0ee68636f546d1f2c36364633a9f}




Definition at line 355 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTA4\_\-REG@{PORTA4\_\-REG}}
\index{PORTA4\_\-REG@{PORTA4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTA4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTA4\_\-REG~PORTA}\label{ATmega32U6_8h_118186f069a85a80ba9b607252f7b872}




Definition at line 356 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTA5\_\-REG@{PORTA5\_\-REG}}
\index{PORTA5\_\-REG@{PORTA5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTA5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTA5\_\-REG~PORTA}\label{ATmega32U6_8h_ae7c16aa4d53dcbc8efedddb46302ec6}




Definition at line 357 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTA6\_\-REG@{PORTA6\_\-REG}}
\index{PORTA6\_\-REG@{PORTA6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTA6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTA6\_\-REG~PORTA}\label{ATmega32U6_8h_4f10d602cb1f8040562ce0740de40071}




Definition at line 358 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTA7\_\-REG@{PORTA7\_\-REG}}
\index{PORTA7\_\-REG@{PORTA7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTA7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTA7\_\-REG~PORTA}\label{ATmega32U6_8h_e898aab8094633737f7f93d8270e9984}




Definition at line 359 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTB0\_\-REG@{PORTB0\_\-REG}}
\index{PORTB0\_\-REG@{PORTB0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTB0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTB0\_\-REG~PORTB}\label{ATmega32U6_8h_814e08d4ce55f8ef9f191bf2d2bb2242}




Definition at line 1178 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTB1\_\-REG@{PORTB1\_\-REG}}
\index{PORTB1\_\-REG@{PORTB1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTB1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTB1\_\-REG~PORTB}\label{ATmega32U6_8h_3eadaad1e12b199a95c7b50317ed4a74}




Definition at line 1179 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTB2\_\-REG@{PORTB2\_\-REG}}
\index{PORTB2\_\-REG@{PORTB2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTB2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTB2\_\-REG~PORTB}\label{ATmega32U6_8h_ea22c0fcf453c2cfed4b484d7dbdd012}




Definition at line 1180 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTB3\_\-REG@{PORTB3\_\-REG}}
\index{PORTB3\_\-REG@{PORTB3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTB3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTB3\_\-REG~PORTB}\label{ATmega32U6_8h_3f3db80ab2df6227b50dcc9167dde63b}




Definition at line 1181 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTB4\_\-REG@{PORTB4\_\-REG}}
\index{PORTB4\_\-REG@{PORTB4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTB4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTB4\_\-REG~PORTB}\label{ATmega32U6_8h_4d2fae120a0ebd695b8ffc6a18abf574}




Definition at line 1182 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTB5\_\-REG@{PORTB5\_\-REG}}
\index{PORTB5\_\-REG@{PORTB5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTB5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTB5\_\-REG~PORTB}\label{ATmega32U6_8h_cbf5541cd8cce15b3d335ec1bb9c6674}




Definition at line 1183 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTB6\_\-REG@{PORTB6\_\-REG}}
\index{PORTB6\_\-REG@{PORTB6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTB6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTB6\_\-REG~PORTB}\label{ATmega32U6_8h_ed9d497eb6d695e499fc490bbc9149fc}




Definition at line 1184 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTB7\_\-REG@{PORTB7\_\-REG}}
\index{PORTB7\_\-REG@{PORTB7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTB7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTB7\_\-REG~PORTB}\label{ATmega32U6_8h_c83c2727ee2a47574b83f215c21be623}




Definition at line 1185 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTC0\_\-REG@{PORTC0\_\-REG}}
\index{PORTC0\_\-REG@{PORTC0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTC0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTC0\_\-REG~PORTC}\label{ATmega32U6_8h_5d396cb8a677196f22e78ed6e10b9a84}




Definition at line 342 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTC1\_\-REG@{PORTC1\_\-REG}}
\index{PORTC1\_\-REG@{PORTC1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTC1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTC1\_\-REG~PORTC}\label{ATmega32U6_8h_e66f8f820a4dbc9eafa90e19164b75ea}




Definition at line 343 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTC2\_\-REG@{PORTC2\_\-REG}}
\index{PORTC2\_\-REG@{PORTC2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTC2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTC2\_\-REG~PORTC}\label{ATmega32U6_8h_855339e43f8c9fa5decf424bf7b22efb}




Definition at line 344 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTC3\_\-REG@{PORTC3\_\-REG}}
\index{PORTC3\_\-REG@{PORTC3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTC3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTC3\_\-REG~PORTC}\label{ATmega32U6_8h_e566336740604af7886c8ac746c3d01d}




Definition at line 345 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTC4\_\-REG@{PORTC4\_\-REG}}
\index{PORTC4\_\-REG@{PORTC4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTC4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTC4\_\-REG~PORTC}\label{ATmega32U6_8h_897deb29e12652f468cfdb16b9e2545d}




Definition at line 346 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTC5\_\-REG@{PORTC5\_\-REG}}
\index{PORTC5\_\-REG@{PORTC5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTC5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTC5\_\-REG~PORTC}\label{ATmega32U6_8h_36161b90f5b63a3c633c3a8b5679bc04}




Definition at line 347 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTC6\_\-REG@{PORTC6\_\-REG}}
\index{PORTC6\_\-REG@{PORTC6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTC6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTC6\_\-REG~PORTC}\label{ATmega32U6_8h_7350f2d4d0b19f13d886f6cdd860413d}




Definition at line 348 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTC7\_\-REG@{PORTC7\_\-REG}}
\index{PORTC7\_\-REG@{PORTC7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTC7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTC7\_\-REG~PORTC}\label{ATmega32U6_8h_e18de085d02b4eddba5c0de0f6afb9a7}




Definition at line 349 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTD0\_\-REG@{PORTD0\_\-REG}}
\index{PORTD0\_\-REG@{PORTD0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTD0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTD0\_\-REG~PORTD}\label{ATmega32U6_8h_2952ce2f503b50c06170b7b28e69ea6e}




Definition at line 312 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTD1\_\-REG@{PORTD1\_\-REG}}
\index{PORTD1\_\-REG@{PORTD1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTD1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTD1\_\-REG~PORTD}\label{ATmega32U6_8h_1f188cc9d7fdd39ba485f47f778927db}




Definition at line 313 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTD2\_\-REG@{PORTD2\_\-REG}}
\index{PORTD2\_\-REG@{PORTD2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTD2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTD2\_\-REG~PORTD}\label{ATmega32U6_8h_dff64c25b54afb91614458b290c48d8c}




Definition at line 314 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTD3\_\-REG@{PORTD3\_\-REG}}
\index{PORTD3\_\-REG@{PORTD3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTD3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTD3\_\-REG~PORTD}\label{ATmega32U6_8h_f1adf662f9735f2de8c6a55ee9bbed6b}




Definition at line 315 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTD4\_\-REG@{PORTD4\_\-REG}}
\index{PORTD4\_\-REG@{PORTD4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTD4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTD4\_\-REG~PORTD}\label{ATmega32U6_8h_f9a7e7598eb580f426478437fc0047e9}




Definition at line 316 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTD5\_\-REG@{PORTD5\_\-REG}}
\index{PORTD5\_\-REG@{PORTD5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTD5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTD5\_\-REG~PORTD}\label{ATmega32U6_8h_8ba06670096d230e69feab9a7168635f}




Definition at line 317 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTD6\_\-REG@{PORTD6\_\-REG}}
\index{PORTD6\_\-REG@{PORTD6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTD6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTD6\_\-REG~PORTD}\label{ATmega32U6_8h_ad804d4f338cac9a1ec917d2ffeafeca}




Definition at line 318 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTD7\_\-REG@{PORTD7\_\-REG}}
\index{PORTD7\_\-REG@{PORTD7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTD7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTD7\_\-REG~PORTD}\label{ATmega32U6_8h_60aee315b1008ef95582a7a1812ce6c5}




Definition at line 319 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTE0\_\-REG@{PORTE0\_\-REG}}
\index{PORTE0\_\-REG@{PORTE0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTE0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTE0\_\-REG~PORTE}\label{ATmega32U6_8h_b854bacbc9db551612ffea38c0fe1a52}




Definition at line 322 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTE1\_\-REG@{PORTE1\_\-REG}}
\index{PORTE1\_\-REG@{PORTE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTE1\_\-REG~PORTE}\label{ATmega32U6_8h_7727169dc9b8a68df9a9a7196ab72e58}




Definition at line 323 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTE2\_\-REG@{PORTE2\_\-REG}}
\index{PORTE2\_\-REG@{PORTE2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTE2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTE2\_\-REG~PORTE}\label{ATmega32U6_8h_14f364293995984d75f193b593cd4a40}




Definition at line 324 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTE3\_\-REG@{PORTE3\_\-REG}}
\index{PORTE3\_\-REG@{PORTE3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTE3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTE3\_\-REG~PORTE}\label{ATmega32U6_8h_bc52a8c04869bade6686a00851a23964}




Definition at line 325 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTE4\_\-REG@{PORTE4\_\-REG}}
\index{PORTE4\_\-REG@{PORTE4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTE4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTE4\_\-REG~PORTE}\label{ATmega32U6_8h_aa6f3306395890596ccd7b0d0369138f}




Definition at line 326 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTE5\_\-REG@{PORTE5\_\-REG}}
\index{PORTE5\_\-REG@{PORTE5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTE5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTE5\_\-REG~PORTE}\label{ATmega32U6_8h_9c9314b1f78380cff4019fb2b68fbff2}




Definition at line 327 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTE6\_\-REG@{PORTE6\_\-REG}}
\index{PORTE6\_\-REG@{PORTE6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTE6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTE6\_\-REG~PORTE}\label{ATmega32U6_8h_d748a8fc9d004bd2a25244ced016b358}




Definition at line 328 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTE7\_\-REG@{PORTE7\_\-REG}}
\index{PORTE7\_\-REG@{PORTE7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTE7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTE7\_\-REG~PORTE}\label{ATmega32U6_8h_bc8da9876a14acedf1aaad2110d43d23}




Definition at line 329 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTF0\_\-REG@{PORTF0\_\-REG}}
\index{PORTF0\_\-REG@{PORTF0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTF0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTF0\_\-REG~PORTF}\label{ATmega32U6_8h_709491ad787dd65cd97fd5af691aa328}




Definition at line 1104 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTF1\_\-REG@{PORTF1\_\-REG}}
\index{PORTF1\_\-REG@{PORTF1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTF1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTF1\_\-REG~PORTF}\label{ATmega32U6_8h_d8e6485b27a6ae5da1a6e3b3638eb4f0}




Definition at line 1105 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTF2\_\-REG@{PORTF2\_\-REG}}
\index{PORTF2\_\-REG@{PORTF2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTF2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTF2\_\-REG~PORTF}\label{ATmega32U6_8h_d3c6b6c56fe9867b6d6a2650d1b16b99}




Definition at line 1106 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTF3\_\-REG@{PORTF3\_\-REG}}
\index{PORTF3\_\-REG@{PORTF3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTF3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTF3\_\-REG~PORTF}\label{ATmega32U6_8h_b63d021fb966c563044439a0a955a4c5}




Definition at line 1107 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTF4\_\-REG@{PORTF4\_\-REG}}
\index{PORTF4\_\-REG@{PORTF4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTF4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTF4\_\-REG~PORTF}\label{ATmega32U6_8h_1429ceb6a528d281eba34b41e7dc0481}




Definition at line 1108 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTF5\_\-REG@{PORTF5\_\-REG}}
\index{PORTF5\_\-REG@{PORTF5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTF5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTF5\_\-REG~PORTF}\label{ATmega32U6_8h_d9f94be6249f27b6c6e5d3838f83b124}




Definition at line 1109 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTF6\_\-REG@{PORTF6\_\-REG}}
\index{PORTF6\_\-REG@{PORTF6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTF6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTF6\_\-REG~PORTF}\label{ATmega32U6_8h_b07cc7474d77ef276884027bce8c00c6}




Definition at line 1110 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PORTF7\_\-REG@{PORTF7\_\-REG}}
\index{PORTF7\_\-REG@{PORTF7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PORTF7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PORTF7\_\-REG~PORTF}\label{ATmega32U6_8h_1712e8adfd920e612ee87ecf3a2dc2e8}




Definition at line 1111 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PRADC\_\-REG@{PRADC\_\-REG}}
\index{PRADC\_\-REG@{PRADC\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PRADC\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PRADC\_\-REG~PRR0}\label{ATmega32U6_8h_d0f5125c0625364b0ee920b1390d9f87}




Definition at line 1070 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PRSPI\_\-REG@{PRSPI\_\-REG}}
\index{PRSPI\_\-REG@{PRSPI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PRSPI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PRSPI\_\-REG~PRR0}\label{ATmega32U6_8h_405188b225f677e63443df42562cb6f4}




Definition at line 1071 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PRTIM0\_\-REG@{PRTIM0\_\-REG}}
\index{PRTIM0\_\-REG@{PRTIM0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PRTIM0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PRTIM0\_\-REG~PRR0}\label{ATmega32U6_8h_383cbcdc57f174082da252908e8d8b7e}




Definition at line 1073 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PRTIM1\_\-REG@{PRTIM1\_\-REG}}
\index{PRTIM1\_\-REG@{PRTIM1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PRTIM1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PRTIM1\_\-REG~PRR0}\label{ATmega32U6_8h_e6b05a19b01448d75b81c43eafa77f7b}




Definition at line 1072 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PRTIM2\_\-REG@{PRTIM2\_\-REG}}
\index{PRTIM2\_\-REG@{PRTIM2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PRTIM2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PRTIM2\_\-REG~PRR0}\label{ATmega32U6_8h_e91dbfc9cca663680d122d0e64481d9e}




Definition at line 1074 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PRTIM3\_\-REG@{PRTIM3\_\-REG}}
\index{PRTIM3\_\-REG@{PRTIM3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PRTIM3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PRTIM3\_\-REG~PRR1}\label{ATmega32U6_8h_b6f4195487ce97a2c1c0757a97c75364}




Definition at line 1371 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PRTWI\_\-REG@{PRTWI\_\-REG}}
\index{PRTWI\_\-REG@{PRTWI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PRTWI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PRTWI\_\-REG~PRR0}\label{ATmega32U6_8h_552a46f3daa707ecc2d40ec31341321f}




Definition at line 1075 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PRUSART1\_\-REG@{PRUSART1\_\-REG}}
\index{PRUSART1\_\-REG@{PRUSART1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PRUSART1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PRUSART1\_\-REG~PRR1}\label{ATmega32U6_8h_7755e629409637bb64660002ae1a3cd5}




Definition at line 1370 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PRUSB\_\-REG@{PRUSB\_\-REG}}
\index{PRUSB\_\-REG@{PRUSB\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PRUSB\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PRUSB\_\-REG~PRR1}\label{ATmega32U6_8h_f16abbe28dcc716d6dae7069094ecb8e}




Definition at line 1372 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PSRASY\_\-REG@{PSRASY\_\-REG}}
\index{PSRASY\_\-REG@{PSRASY\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PSRASY\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PSRASY\_\-REG~GTCCR}\label{ATmega32U6_8h_90ee2f61fdf1b47c357187957010ca69}




Definition at line 730 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PSRSYNC\_\-REG@{PSRSYNC\_\-REG}}
\index{PSRSYNC\_\-REG@{PSRSYNC\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PSRSYNC\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PSRSYNC\_\-REG~GTCCR}\label{ATmega32U6_8h_628a64a640746546004768242b9a2144}




Definition at line 728 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PUD\_\-REG@{PUD\_\-REG}}
\index{PUD\_\-REG@{PUD\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PUD\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define PUD\_\-REG~MCUCR}\label{ATmega32U6_8h_4695ce5358406651354ca4f021d1d2d6}




Definition at line 922 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM0A\_\-NUM@{PWM0A\_\-NUM}}
\index{PWM0A\_\-NUM@{PWM0A\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM0A\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM0A\_\-NUM~0}\label{ATmega32U6_8h_26a4d91e8c8b3e6bda070e62ef0d0e9c}




Definition at line 141 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM0B\_\-NUM@{PWM0B\_\-NUM}}
\index{PWM0B\_\-NUM@{PWM0B\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM0B\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM0B\_\-NUM~1}\label{ATmega32U6_8h_4bbb228e78b5a8052d9366675b4ddb88}




Definition at line 142 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM1A\_\-NUM@{PWM1A\_\-NUM}}
\index{PWM1A\_\-NUM@{PWM1A\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM1A\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM1A\_\-NUM~2}\label{ATmega32U6_8h_fc895f54605ed61bfbe2cda6c31b216e}




Definition at line 143 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM1B\_\-NUM@{PWM1B\_\-NUM}}
\index{PWM1B\_\-NUM@{PWM1B\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM1B\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM1B\_\-NUM~3}\label{ATmega32U6_8h_d83fb739b3594fe37719f65cca2470eb}




Definition at line 144 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM1C\_\-NUM@{PWM1C\_\-NUM}}
\index{PWM1C\_\-NUM@{PWM1C\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM1C\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM1C\_\-NUM~4}\label{ATmega32U6_8h_6957866cf3cf236e5cafac768c107014}




Definition at line 145 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM2A\_\-NUM@{PWM2A\_\-NUM}}
\index{PWM2A\_\-NUM@{PWM2A\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM2A\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM2A\_\-NUM~5}\label{ATmega32U6_8h_fa00c01730ed6a9d7c55bd74a0f8f4c2}




Definition at line 146 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM2B\_\-NUM@{PWM2B\_\-NUM}}
\index{PWM2B\_\-NUM@{PWM2B\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM2B\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM2B\_\-NUM~6}\label{ATmega32U6_8h_cf55c8a6a6586ffb27c5ef5a5f93a066}




Definition at line 147 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM3A\_\-NUM@{PWM3A\_\-NUM}}
\index{PWM3A\_\-NUM@{PWM3A\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM3A\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM3A\_\-NUM~7}\label{ATmega32U6_8h_6f11f6ab79b3543048fe59dc552608ce}




Definition at line 148 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM3B\_\-NUM@{PWM3B\_\-NUM}}
\index{PWM3B\_\-NUM@{PWM3B\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM3B\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM3B\_\-NUM~8}\label{ATmega32U6_8h_78c7cef9418be72e45539c050446552f}




Definition at line 149 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM3C\_\-NUM@{PWM3C\_\-NUM}}
\index{PWM3C\_\-NUM@{PWM3C\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM3C\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM3C\_\-NUM~9}\label{ATmega32U6_8h_834497fa4574cab5e7117748393703b5}




Definition at line 150 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!PWM\_\-TOTAL\_\-NUM@{PWM\_\-TOTAL\_\-NUM}}
\index{PWM\_\-TOTAL\_\-NUM@{PWM\_\-TOTAL\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[PWM\_\-TOTAL\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define PWM\_\-TOTAL\_\-NUM~10}\label{ATmega32U6_8h_7cb4da096f48116b7ab3d837e16dd1e1}




Definition at line 151 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!REFS0\_\-REG@{REFS0\_\-REG}}
\index{REFS0\_\-REG@{REFS0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[REFS0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define REFS0\_\-REG~ADMUX}\label{ATmega32U6_8h_68b29d640322aade8917f668742ff817}




Definition at line 171 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!REFS1\_\-REG@{REFS1\_\-REG}}
\index{REFS1\_\-REG@{REFS1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[REFS1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define REFS1\_\-REG~ADMUX}\label{ATmega32U6_8h_35bc81dac549141d8b63a5ecc5c67db4}




Definition at line 172 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RMWKUP\_\-REG@{RMWKUP\_\-REG}}
\index{RMWKUP\_\-REG@{RMWKUP\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RMWKUP\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RMWKUP\_\-REG~UDCON}\label{ATmega32U6_8h_24e63a8fbbf26be8276b8b08d5832211}




Definition at line 592 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RSTDT\_\-REG@{RSTDT\_\-REG}}
\index{RSTDT\_\-REG@{RSTDT\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RSTDT\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RSTDT\_\-REG~UECONX}\label{ATmega32U6_8h_4d70c82f669d6a330fce067e9f4e312a}




Definition at line 895 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RWAL\_\-REG@{RWAL\_\-REG}}
\index{RWAL\_\-REG@{RWAL\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RWAL\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RWAL\_\-REG~UEINTX}\label{ATmega32U6_8h_184ae47082c686c03ea4dfab8374dd2c}




Definition at line 782 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RWWSB\_\-REG@{RWWSB\_\-REG}}
\index{RWWSB\_\-REG@{RWWSB\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RWWSB\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RWWSB\_\-REG~SPMCSR}\label{ATmega32U6_8h_a49c40927ba6e250afac9c32118398d9}




Definition at line 1165 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RWWSRE\_\-REG@{RWWSRE\_\-REG}}
\index{RWWSRE\_\-REG@{RWWSRE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RWWSRE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RWWSRE\_\-REG~SPMCSR}\label{ATmega32U6_8h_5a79ba3615229f283e1e74d46b6800a3}




Definition at line 1163 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RXB81\_\-REG@{RXB81\_\-REG}}
\index{RXB81\_\-REG@{RXB81\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RXB81\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RXB81\_\-REG~UCSR1B}\label{ATmega32U6_8h_f0d343d778ce0e1267d20e68bad57aea}




Definition at line 980 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RXC1\_\-REG@{RXC1\_\-REG}}
\index{RXC1\_\-REG@{RXC1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RXC1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RXC1\_\-REG~UCSR1A}\label{ATmega32U6_8h_9a6ec1e3d3abf33fdb2d1c96eccba69b}




Definition at line 1006 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RXCIE1\_\-REG@{RXCIE1\_\-REG}}
\index{RXCIE1\_\-REG@{RXCIE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RXCIE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RXCIE1\_\-REG~UCSR1B}\label{ATmega32U6_8h_622d8b73340b4e6f93fe83ce761fefcb}




Definition at line 986 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RXEN1\_\-REG@{RXEN1\_\-REG}}
\index{RXEN1\_\-REG@{RXEN1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RXEN1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RXEN1\_\-REG~UCSR1B}\label{ATmega32U6_8h_7772a23f5bd90bc4f563d7f7cc2ac574}




Definition at line 983 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RXOUTE\_\-REG@{RXOUTE\_\-REG}}
\index{RXOUTE\_\-REG@{RXOUTE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RXOUTE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RXOUTE\_\-REG~UEIENX}\label{ATmega32U6_8h_25e08f482eb892d55711c7013e44d17f}




Definition at line 972 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RXOUTI\_\-REG@{RXOUTI\_\-REG}}
\index{RXOUTI\_\-REG@{RXOUTI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RXOUTI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RXOUTI\_\-REG~UEINTX}\label{ATmega32U6_8h_499289d1ce3e796749e48a160b51002e}




Definition at line 779 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RXSTPE\_\-REG@{RXSTPE\_\-REG}}
\index{RXSTPE\_\-REG@{RXSTPE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RXSTPE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RXSTPE\_\-REG~UEIENX}\label{ATmega32U6_8h_d241955df0af97213a5e4a12e4b4c780}




Definition at line 973 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!RXSTPI\_\-REG@{RXSTPI\_\-REG}}
\index{RXSTPI\_\-REG@{RXSTPI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[RXSTPI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define RXSTPI\_\-REG~UEINTX}\label{ATmega32U6_8h_a2250365c18e902b267bd1e7b3beca71}




Definition at line 780 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!S\_\-REG@{S\_\-REG}}
\index{S\_\-REG@{S\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[S\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define S\_\-REG~SREG}\label{ATmega32U6_8h_d5c67a4893fa78c73eb10898d520766a}




Definition at line 461 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SE\_\-REG@{SE\_\-REG}}
\index{SE\_\-REG@{SE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SE\_\-REG~SMCR}\label{ATmega32U6_8h_3753fa832d100be472ba02984bafbb97}




Definition at line 860 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-INPUT\_\-CAPTURE1\_\-NUM@{SIG\_\-INPUT\_\-CAPTURE1\_\-NUM}}
\index{SIG\_\-INPUT\_\-CAPTURE1\_\-NUM@{SIG\_\-INPUT\_\-CAPTURE1\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-INPUT\_\-CAPTURE1\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-INPUT\_\-CAPTURE1\_\-NUM~0}\label{ATmega32U6_8h_0c87454bc091184215305e24524b2daf}




Definition at line 154 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-INPUT\_\-CAPTURE3\_\-NUM@{SIG\_\-INPUT\_\-CAPTURE3\_\-NUM}}
\index{SIG\_\-INPUT\_\-CAPTURE3\_\-NUM@{SIG\_\-INPUT\_\-CAPTURE3\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-INPUT\_\-CAPTURE3\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-INPUT\_\-CAPTURE3\_\-NUM~1}\label{ATmega32U6_8h_9f8b6beaf61834f4b0490752353f22f9}




Definition at line 155 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-INPUT\_\-CAPTURE\_\-TOTAL\_\-NUM@{SIG\_\-INPUT\_\-CAPTURE\_\-TOTAL\_\-NUM}}
\index{SIG\_\-INPUT\_\-CAPTURE\_\-TOTAL\_\-NUM@{SIG\_\-INPUT\_\-CAPTURE\_\-TOTAL\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-INPUT\_\-CAPTURE\_\-TOTAL\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-INPUT\_\-CAPTURE\_\-TOTAL\_\-NUM~2}\label{ATmega32U6_8h_c42ea58970ddffa0fa9ee4be1fed0f2e}




Definition at line 156 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE0A\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE0A\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE0A\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE0A\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE0A\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE0A\_\-NUM~0}\label{ATmega32U6_8h_d3b7b674796226bbd43f40729527742a}




Definition at line 128 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE0B\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE0B\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE0B\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE0B\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE0B\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE0B\_\-NUM~1}\label{ATmega32U6_8h_af9fdd09778af08c30379ea871073bdd}




Definition at line 129 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE1A\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE1A\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE1A\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE1A\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE1A\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE1A\_\-NUM~2}\label{ATmega32U6_8h_8408f4acff57cfdd5d0fa1b75efbdf82}




Definition at line 130 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE1B\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE1B\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE1B\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE1B\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE1B\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE1B\_\-NUM~3}\label{ATmega32U6_8h_2a83b7ecaaa93887915fb1fa10ffd988}




Definition at line 131 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE1C\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE1C\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE1C\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE1C\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE1C\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE1C\_\-NUM~4}\label{ATmega32U6_8h_68bfad97b3100ef25225d88d5bcefab8}




Definition at line 132 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE2A\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE2A\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE2A\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE2A\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE2A\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE2A\_\-NUM~5}\label{ATmega32U6_8h_fa5c57689ed32f64943abcf1a8757fbc}




Definition at line 133 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE2B\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE2B\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE2B\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE2B\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE2B\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE2B\_\-NUM~6}\label{ATmega32U6_8h_faeb7ff69b7d18b4e5462f5175fec138}




Definition at line 134 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE3A\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE3A\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE3A\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE3A\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE3A\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE3A\_\-NUM~7}\label{ATmega32U6_8h_a5eaff4f1fc6cf2092599c431b3ce83d}




Definition at line 135 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE3B\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE3B\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE3B\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE3B\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE3B\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE3B\_\-NUM~8}\label{ATmega32U6_8h_e8caa530cbb2aabb8b89eae287ea61ce}




Definition at line 136 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE3C\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE3C\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE3C\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE3C\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE3C\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE3C\_\-NUM~9}\label{ATmega32U6_8h_842d6f22c9d8d6404435b8e5505e4e55}




Definition at line 137 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OUTPUT\_\-COMPARE\_\-TOTAL\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE\_\-TOTAL\_\-NUM}}
\index{SIG\_\-OUTPUT\_\-COMPARE\_\-TOTAL\_\-NUM@{SIG\_\-OUTPUT\_\-COMPARE\_\-TOTAL\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OUTPUT\_\-COMPARE\_\-TOTAL\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OUTPUT\_\-COMPARE\_\-TOTAL\_\-NUM~10}\label{ATmega32U6_8h_b79e450e7a2efdb68b3284986e261eb6}




Definition at line 138 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OVERFLOW0\_\-NUM@{SIG\_\-OVERFLOW0\_\-NUM}}
\index{SIG\_\-OVERFLOW0\_\-NUM@{SIG\_\-OVERFLOW0\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OVERFLOW0\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OVERFLOW0\_\-NUM~0}\label{ATmega32U6_8h_dc2c1549d25c6f392c3142151e6b5ad9}




Definition at line 121 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OVERFLOW1\_\-NUM@{SIG\_\-OVERFLOW1\_\-NUM}}
\index{SIG\_\-OVERFLOW1\_\-NUM@{SIG\_\-OVERFLOW1\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OVERFLOW1\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OVERFLOW1\_\-NUM~1}\label{ATmega32U6_8h_f350cb76b8d5ff2b88b7c605b04ef67e}




Definition at line 122 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OVERFLOW2\_\-NUM@{SIG\_\-OVERFLOW2\_\-NUM}}
\index{SIG\_\-OVERFLOW2\_\-NUM@{SIG\_\-OVERFLOW2\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OVERFLOW2\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OVERFLOW2\_\-NUM~2}\label{ATmega32U6_8h_d4d95d9a4eb85ffbd9799fce96ad76c8}




Definition at line 123 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OVERFLOW3\_\-NUM@{SIG\_\-OVERFLOW3\_\-NUM}}
\index{SIG\_\-OVERFLOW3\_\-NUM@{SIG\_\-OVERFLOW3\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OVERFLOW3\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OVERFLOW3\_\-NUM~3}\label{ATmega32U6_8h_a950c4bcbde2a6aa9886052cba34bd7d}




Definition at line 124 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIG\_\-OVERFLOW\_\-TOTAL\_\-NUM@{SIG\_\-OVERFLOW\_\-TOTAL\_\-NUM}}
\index{SIG\_\-OVERFLOW\_\-TOTAL\_\-NUM@{SIG\_\-OVERFLOW\_\-TOTAL\_\-NUM}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIG\_\-OVERFLOW\_\-TOTAL\_\-NUM]{\setlength{\rightskip}{0pt plus 5cm}\#define SIG\_\-OVERFLOW\_\-TOTAL\_\-NUM~4}\label{ATmega32U6_8h_2d8b8ff307d3ab929cbfe927dcb4dedb}




Definition at line 125 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SIGRD\_\-REG@{SIGRD\_\-REG}}
\index{SIGRD\_\-REG@{SIGRD\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SIGRD\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SIGRD\_\-REG~SPMCSR}\label{ATmega32U6_8h_073b29aae3c3f2175ad89495285d0839}




Definition at line 1164 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SM0\_\-REG@{SM0\_\-REG}}
\index{SM0\_\-REG@{SM0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SM0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SM0\_\-REG~SMCR}\label{ATmega32U6_8h_ecdc6672d1da1703528bb4c6a175cccd}




Definition at line 861 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SM1\_\-REG@{SM1\_\-REG}}
\index{SM1\_\-REG@{SM1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SM1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SM1\_\-REG~SMCR}\label{ATmega32U6_8h_cf3ed9d8a05266beda14d174c478aafe}




Definition at line 862 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SM2\_\-REG@{SM2\_\-REG}}
\index{SM2\_\-REG@{SM2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SM2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SM2\_\-REG~SMCR}\label{ATmega32U6_8h_518ceb13930595fb924655cf11ca929f}




Definition at line 863 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SOFE\_\-REG@{SOFE\_\-REG}}
\index{SOFE\_\-REG@{SOFE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SOFE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SOFE\_\-REG~UDIEN}\label{ATmega32U6_8h_666e0a970be93e9e6338f348e65e6bf3}




Definition at line 176 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SOFI\_\-REG@{SOFI\_\-REG}}
\index{SOFI\_\-REG@{SOFI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SOFI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SOFI\_\-REG~UDINT}\label{ATmega32U6_8h_6adefdd6eb1528e6dcefc7924e86d7d4}




Definition at line 214 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP0\_\-REG@{SP0\_\-REG}}
\index{SP0\_\-REG@{SP0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP0\_\-REG~SPL}\label{ATmega32U6_8h_5608c5fb647d16f5100e81ba32d53321}




Definition at line 827 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP10\_\-REG@{SP10\_\-REG}}
\index{SP10\_\-REG@{SP10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP10\_\-REG~SPH}\label{ATmega32U6_8h_82b9e11bea11d7278380f73ebd8b3e65}




Definition at line 745 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP11\_\-REG@{SP11\_\-REG}}
\index{SP11\_\-REG@{SP11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP11\_\-REG~SPH}\label{ATmega32U6_8h_83a324a8dfc1aefa1ecf888731fb8038}




Definition at line 746 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP12\_\-REG@{SP12\_\-REG}}
\index{SP12\_\-REG@{SP12\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP12\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP12\_\-REG~SPH}\label{ATmega32U6_8h_0507d8ec64852e32084acbb2a1f02c73}




Definition at line 747 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP13\_\-REG@{SP13\_\-REG}}
\index{SP13\_\-REG@{SP13\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP13\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP13\_\-REG~SPH}\label{ATmega32U6_8h_7cd2a6caf6bc98d15733f3392ce831fe}




Definition at line 748 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP14\_\-REG@{SP14\_\-REG}}
\index{SP14\_\-REG@{SP14\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP14\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP14\_\-REG~SPH}\label{ATmega32U6_8h_20f5e9c3debe0298791627de76aa4d02}




Definition at line 749 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP15\_\-REG@{SP15\_\-REG}}
\index{SP15\_\-REG@{SP15\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP15\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP15\_\-REG~SPH}\label{ATmega32U6_8h_97fdf98f15cbbfebbb2d0bb9ad8bda2d}




Definition at line 750 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP1\_\-REG@{SP1\_\-REG}}
\index{SP1\_\-REG@{SP1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP1\_\-REG~SPL}\label{ATmega32U6_8h_dcc9607ff34ab7b4442d36474ff4e64f}




Definition at line 828 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP2\_\-REG@{SP2\_\-REG}}
\index{SP2\_\-REG@{SP2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP2\_\-REG~SPL}\label{ATmega32U6_8h_1c046e06f5d6f64e29defa4a461881f6}




Definition at line 829 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP3\_\-REG@{SP3\_\-REG}}
\index{SP3\_\-REG@{SP3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP3\_\-REG~SPL}\label{ATmega32U6_8h_51ab7d3611a5aac013930eed859dc8dd}




Definition at line 830 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP4\_\-REG@{SP4\_\-REG}}
\index{SP4\_\-REG@{SP4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP4\_\-REG~SPL}\label{ATmega32U6_8h_6b1c6fa1974ceeef4a00a305a06e7196}




Definition at line 831 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP5\_\-REG@{SP5\_\-REG}}
\index{SP5\_\-REG@{SP5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP5\_\-REG~SPL}\label{ATmega32U6_8h_5fbfd4d58925f91318ad6134055bef03}




Definition at line 832 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP6\_\-REG@{SP6\_\-REG}}
\index{SP6\_\-REG@{SP6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP6\_\-REG~SPL}\label{ATmega32U6_8h_c0f324075c96f94eee13eb815e489011}




Definition at line 833 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP7\_\-REG@{SP7\_\-REG}}
\index{SP7\_\-REG@{SP7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP7\_\-REG~SPL}\label{ATmega32U6_8h_02c78d91b95bbb40b4b353bef14004b1}




Definition at line 834 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP8\_\-REG@{SP8\_\-REG}}
\index{SP8\_\-REG@{SP8\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP8\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP8\_\-REG~SPH}\label{ATmega32U6_8h_604be5836f953abd148459e518e6da83}




Definition at line 743 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SP9\_\-REG@{SP9\_\-REG}}
\index{SP9\_\-REG@{SP9\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SP9\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SP9\_\-REG~SPH}\label{ATmega32U6_8h_947920343c0f3c53df283bd7dc6415a8}




Definition at line 744 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPDR0\_\-REG@{SPDR0\_\-REG}}
\index{SPDR0\_\-REG@{SPDR0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPDR0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPDR0\_\-REG~SPDR}\label{ATmega32U6_8h_e286d1a386e37005b9d33ee8781e5198}




Definition at line 258 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPDR1\_\-REG@{SPDR1\_\-REG}}
\index{SPDR1\_\-REG@{SPDR1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPDR1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPDR1\_\-REG~SPDR}\label{ATmega32U6_8h_f40c61e455863cc19bac9e54791a50f8}




Definition at line 259 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPDR2\_\-REG@{SPDR2\_\-REG}}
\index{SPDR2\_\-REG@{SPDR2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPDR2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPDR2\_\-REG~SPDR}\label{ATmega32U6_8h_cd9796a2ab7b1a9a89105425c9cf294b}




Definition at line 260 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPDR3\_\-REG@{SPDR3\_\-REG}}
\index{SPDR3\_\-REG@{SPDR3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPDR3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPDR3\_\-REG~SPDR}\label{ATmega32U6_8h_e1c964da24dbd8109ec3c90c69e78218}




Definition at line 261 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPDR4\_\-REG@{SPDR4\_\-REG}}
\index{SPDR4\_\-REG@{SPDR4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPDR4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPDR4\_\-REG~SPDR}\label{ATmega32U6_8h_ca43310cbbf5ea67c095b3dfc9437b34}




Definition at line 262 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPDR5\_\-REG@{SPDR5\_\-REG}}
\index{SPDR5\_\-REG@{SPDR5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPDR5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPDR5\_\-REG~SPDR}\label{ATmega32U6_8h_b0f3b8e641df5b65f70b54cab463c7b7}




Definition at line 263 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPDR6\_\-REG@{SPDR6\_\-REG}}
\index{SPDR6\_\-REG@{SPDR6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPDR6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPDR6\_\-REG~SPDR}\label{ATmega32U6_8h_92c3248d93896bbec6d887e27857ff08}




Definition at line 264 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPDR7\_\-REG@{SPDR7\_\-REG}}
\index{SPDR7\_\-REG@{SPDR7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPDR7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPDR7\_\-REG~SPDR}\label{ATmega32U6_8h_2905bb24119fdabe4a060868aad2ada4}




Definition at line 265 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPE\_\-REG@{SPE\_\-REG}}
\index{SPE\_\-REG@{SPE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPE\_\-REG~SPCR}\label{ATmega32U6_8h_497e4f232fae50934427462563aa5283}




Definition at line 676 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPEED\_\-REG@{SPEED\_\-REG}}
\index{SPEED\_\-REG@{SPEED\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPEED\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPEED\_\-REG~USBSTA}\label{ATmega32U6_8h_22377063693a62e55d6b8df8e225dbb7}




Definition at line 967 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPI2X\_\-REG@{SPI2X\_\-REG}}
\index{SPI2X\_\-REG@{SPI2X\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPI2X\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPI2X\_\-REG~SPSR}\label{ATmega32U6_8h_a6662a9529be90e21a08fee8d528f3ba}




Definition at line 268 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPIE\_\-REG@{SPIE\_\-REG}}
\index{SPIE\_\-REG@{SPIE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPIE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPIE\_\-REG~SPCR}\label{ATmega32U6_8h_4a6335b178fe328bd1d084920d22dc00}




Definition at line 677 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPIF\_\-REG@{SPIF\_\-REG}}
\index{SPIF\_\-REG@{SPIF\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPIF\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPIF\_\-REG~SPSR}\label{ATmega32U6_8h_20bcff325abee56d7bde984028c2cb00}




Definition at line 270 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPMEN\_\-REG@{SPMEN\_\-REG}}
\index{SPMEN\_\-REG@{SPMEN\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPMEN\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPMEN\_\-REG~SPMCSR}\label{ATmega32U6_8h_4de612ee44ba85f90ac3cf6e3c3afed9}




Definition at line 1159 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPMIE\_\-REG@{SPMIE\_\-REG}}
\index{SPMIE\_\-REG@{SPMIE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPMIE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPMIE\_\-REG~SPMCSR}\label{ATmega32U6_8h_5da07c9aab4947a615b084b35617d357}




Definition at line 1166 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPR0\_\-REG@{SPR0\_\-REG}}
\index{SPR0\_\-REG@{SPR0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPR0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR0\_\-REG~SPCR}\label{ATmega32U6_8h_f13a1c9cc5f642805db9db0c921a7e02}




Definition at line 670 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SPR1\_\-REG@{SPR1\_\-REG}}
\index{SPR1\_\-REG@{SPR1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SPR1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SPR1\_\-REG~SPCR}\label{ATmega32U6_8h_9a0ee0d8d33bf697c23db9b29b1d64c5}




Definition at line 671 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SRE\_\-REG@{SRE\_\-REG}}
\index{SRE\_\-REG@{SRE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SRE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SRE\_\-REG~XMCRA}\label{ATmega32U6_8h_c4f79547d408c9f49d5fe57bd445dea6}




Definition at line 1282 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SRL0\_\-REG@{SRL0\_\-REG}}
\index{SRL0\_\-REG@{SRL0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SRL0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SRL0\_\-REG~XMCRA}\label{ATmega32U6_8h_181acf010a892f284be1937bebe2007c}




Definition at line 1279 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SRL1\_\-REG@{SRL1\_\-REG}}
\index{SRL1\_\-REG@{SRL1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SRL1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SRL1\_\-REG~XMCRA}\label{ATmega32U6_8h_8b9cfe431b2bbc4aabca521a7450fc8e}




Definition at line 1280 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SRL2\_\-REG@{SRL2\_\-REG}}
\index{SRL2\_\-REG@{SRL2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SRL2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SRL2\_\-REG~XMCRA}\label{ATmega32U6_8h_fac4e2e7a87a9097003a3be31dce5888}




Definition at line 1281 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SRW00\_\-REG@{SRW00\_\-REG}}
\index{SRW00\_\-REG@{SRW00\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SRW00\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SRW00\_\-REG~XMCRA}\label{ATmega32U6_8h_96595f32a424e80f6e815363496b1c61}




Definition at line 1275 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SRW01\_\-REG@{SRW01\_\-REG}}
\index{SRW01\_\-REG@{SRW01\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SRW01\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SRW01\_\-REG~XMCRA}\label{ATmega32U6_8h_42a57dc7b29d7cd416946e2ac4911af1}




Definition at line 1276 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SRW10\_\-REG@{SRW10\_\-REG}}
\index{SRW10\_\-REG@{SRW10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SRW10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SRW10\_\-REG~XMCRA}\label{ATmega32U6_8h_d74fa983e1a48aa72614cc50d3168059}




Definition at line 1277 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SRW11\_\-REG@{SRW11\_\-REG}}
\index{SRW11\_\-REG@{SRW11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SRW11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SRW11\_\-REG~XMCRA}\label{ATmega32U6_8h_c3354c9e72a9907d19a5163e2d46abb9}




Definition at line 1278 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!STALLEDE\_\-REG@{STALLEDE\_\-REG}}
\index{STALLEDE\_\-REG@{STALLEDE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[STALLEDE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define STALLEDE\_\-REG~UEIENX}\label{ATmega32U6_8h_09829cf8237b92b55e9b0f080ecd23cb}




Definition at line 971 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!STALLEDI\_\-REG@{STALLEDI\_\-REG}}
\index{STALLEDI\_\-REG@{STALLEDI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[STALLEDI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define STALLEDI\_\-REG~UEINTX}\label{ATmega32U6_8h_4803383ca1017fb3e754acb0017a1070}




Definition at line 778 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!STALLRQ\_\-REG@{STALLRQ\_\-REG}}
\index{STALLRQ\_\-REG@{STALLRQ\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[STALLRQ\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define STALLRQ\_\-REG~UECONX}\label{ATmega32U6_8h_dbff521c2a55b7a38be43dfc997c17e8}




Definition at line 897 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!STALLRQC\_\-REG@{STALLRQC\_\-REG}}
\index{STALLRQC\_\-REG@{STALLRQC\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[STALLRQC\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define STALLRQC\_\-REG~UECONX}\label{ATmega32U6_8h_3fab985d4f9f33e4a63cf275b9b718b7}




Definition at line 896 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SUSPE\_\-REG@{SUSPE\_\-REG}}
\index{SUSPE\_\-REG@{SUSPE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SUSPE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SUSPE\_\-REG~UDIEN}\label{ATmega32U6_8h_e927db57e50453a27bc718afd727cf86}




Definition at line 175 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!SUSPI\_\-REG@{SUSPI\_\-REG}}
\index{SUSPI\_\-REG@{SUSPI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[SUSPI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define SUSPI\_\-REG~UDINT}\label{ATmega32U6_8h_9e209e602b72d3b4efed763216cf8b4f}




Definition at line 213 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!T\_\-REG@{T\_\-REG}}
\index{T\_\-REG@{T\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[T\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define T\_\-REG~SREG}\label{ATmega32U6_8h_109aeb5473f651bba0263dbf92c97221}




Definition at line 463 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCN2UB\_\-REG@{TCN2UB\_\-REG}}
\index{TCN2UB\_\-REG@{TCN2UB\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCN2UB\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCN2UB\_\-REG~ASSR}\label{ATmega32U6_8h_65c659c3e61654d8f120f594c9b5f1f7}




Definition at line 445 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT0\_\-0\_\-REG@{TCNT0\_\-0\_\-REG}}
\index{TCNT0\_\-0\_\-REG@{TCNT0\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT0\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT0\_\-0\_\-REG~TCNT0}\label{ATmega32U6_8h_c1f8fccfbb821380dfd50315f3f538cb}




Definition at line 613 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT0\_\-1\_\-REG@{TCNT0\_\-1\_\-REG}}
\index{TCNT0\_\-1\_\-REG@{TCNT0\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT0\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT0\_\-1\_\-REG~TCNT0}\label{ATmega32U6_8h_fefb95d2e9de396641a5c8508afc6296}




Definition at line 614 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT0\_\-2\_\-REG@{TCNT0\_\-2\_\-REG}}
\index{TCNT0\_\-2\_\-REG@{TCNT0\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT0\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT0\_\-2\_\-REG~TCNT0}\label{ATmega32U6_8h_65ae573967a4ed2b4c8a214668d8819a}




Definition at line 615 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT0\_\-3\_\-REG@{TCNT0\_\-3\_\-REG}}
\index{TCNT0\_\-3\_\-REG@{TCNT0\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT0\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT0\_\-3\_\-REG~TCNT0}\label{ATmega32U6_8h_f63de593254505c1f2bca9431ebd488c}




Definition at line 616 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT0\_\-4\_\-REG@{TCNT0\_\-4\_\-REG}}
\index{TCNT0\_\-4\_\-REG@{TCNT0\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT0\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT0\_\-4\_\-REG~TCNT0}\label{ATmega32U6_8h_72502a03cb165c8e4b17719ae81bf4d3}




Definition at line 617 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT0\_\-5\_\-REG@{TCNT0\_\-5\_\-REG}}
\index{TCNT0\_\-5\_\-REG@{TCNT0\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT0\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT0\_\-5\_\-REG~TCNT0}\label{ATmega32U6_8h_0be8f29978a33d59b4bd325e5a085558}




Definition at line 618 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT0\_\-6\_\-REG@{TCNT0\_\-6\_\-REG}}
\index{TCNT0\_\-6\_\-REG@{TCNT0\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT0\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT0\_\-6\_\-REG~TCNT0}\label{ATmega32U6_8h_86097e27c8c0d84023574094a043d6de}




Definition at line 619 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT0\_\-7\_\-REG@{TCNT0\_\-7\_\-REG}}
\index{TCNT0\_\-7\_\-REG@{TCNT0\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT0\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT0\_\-7\_\-REG~TCNT0}\label{ATmega32U6_8h_9921b9c8a6f52d305a1c2334012063db}




Definition at line 620 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1H0\_\-REG@{TCNT1H0\_\-REG}}
\index{TCNT1H0\_\-REG@{TCNT1H0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1H0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1H0\_\-REG~TCNT1H}\label{ATmega32U6_8h_a25ece3bdccc712500a9fb51af5fe557}




Definition at line 332 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1H1\_\-REG@{TCNT1H1\_\-REG}}
\index{TCNT1H1\_\-REG@{TCNT1H1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1H1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1H1\_\-REG~TCNT1H}\label{ATmega32U6_8h_d97ed8249b922cc19cecc021c12ea783}




Definition at line 333 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1H2\_\-REG@{TCNT1H2\_\-REG}}
\index{TCNT1H2\_\-REG@{TCNT1H2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1H2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1H2\_\-REG~TCNT1H}\label{ATmega32U6_8h_f578b228d973cb4d616eb51d37765697}




Definition at line 334 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1H3\_\-REG@{TCNT1H3\_\-REG}}
\index{TCNT1H3\_\-REG@{TCNT1H3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1H3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1H3\_\-REG~TCNT1H}\label{ATmega32U6_8h_5627b674239b3c237b3327a6fe72bbbd}




Definition at line 335 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1H4\_\-REG@{TCNT1H4\_\-REG}}
\index{TCNT1H4\_\-REG@{TCNT1H4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1H4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1H4\_\-REG~TCNT1H}\label{ATmega32U6_8h_23dc0075885d6a295d9b2044f65170d0}




Definition at line 336 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1H5\_\-REG@{TCNT1H5\_\-REG}}
\index{TCNT1H5\_\-REG@{TCNT1H5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1H5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1H5\_\-REG~TCNT1H}\label{ATmega32U6_8h_93aa52885a457f46936c4501fdad82ff}




Definition at line 337 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1H6\_\-REG@{TCNT1H6\_\-REG}}
\index{TCNT1H6\_\-REG@{TCNT1H6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1H6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1H6\_\-REG~TCNT1H}\label{ATmega32U6_8h_4d94dde3b93ff056ff7ceb0774907803}




Definition at line 338 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1H7\_\-REG@{TCNT1H7\_\-REG}}
\index{TCNT1H7\_\-REG@{TCNT1H7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1H7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1H7\_\-REG~TCNT1H}\label{ATmega32U6_8h_94072c2c6d4a730d86ad0a3d91375e44}




Definition at line 339 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1L0\_\-REG@{TCNT1L0\_\-REG}}
\index{TCNT1L0\_\-REG@{TCNT1L0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1L0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1L0\_\-REG~TCNT1L}\label{ATmega32U6_8h_188d60f8d09fc037b9c5a8cb850f620d}




Definition at line 302 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1L1\_\-REG@{TCNT1L1\_\-REG}}
\index{TCNT1L1\_\-REG@{TCNT1L1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1L1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1L1\_\-REG~TCNT1L}\label{ATmega32U6_8h_7ae20ef3144cb261ffbc188904aa6fc8}




Definition at line 303 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1L2\_\-REG@{TCNT1L2\_\-REG}}
\index{TCNT1L2\_\-REG@{TCNT1L2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1L2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1L2\_\-REG~TCNT1L}\label{ATmega32U6_8h_9d359e3c9797388743e07f62cd6a7f69}




Definition at line 304 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1L3\_\-REG@{TCNT1L3\_\-REG}}
\index{TCNT1L3\_\-REG@{TCNT1L3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1L3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1L3\_\-REG~TCNT1L}\label{ATmega32U6_8h_60acfda9c5f3665a29d7fc035cc14e9f}




Definition at line 305 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1L4\_\-REG@{TCNT1L4\_\-REG}}
\index{TCNT1L4\_\-REG@{TCNT1L4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1L4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1L4\_\-REG~TCNT1L}\label{ATmega32U6_8h_3372b7f2a7af05e0763489f98de9acbb}




Definition at line 306 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1L5\_\-REG@{TCNT1L5\_\-REG}}
\index{TCNT1L5\_\-REG@{TCNT1L5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1L5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1L5\_\-REG~TCNT1L}\label{ATmega32U6_8h_b799b9cca3dc49d5eeccb878498a54d6}




Definition at line 307 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1L6\_\-REG@{TCNT1L6\_\-REG}}
\index{TCNT1L6\_\-REG@{TCNT1L6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1L6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1L6\_\-REG~TCNT1L}\label{ATmega32U6_8h_0b9c322bd0d2e05fba2d599682f68577}




Definition at line 308 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT1L7\_\-REG@{TCNT1L7\_\-REG}}
\index{TCNT1L7\_\-REG@{TCNT1L7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT1L7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT1L7\_\-REG~TCNT1L}\label{ATmega32U6_8h_d79699eade7a8ffaa386919f3b7495df}




Definition at line 309 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT2\_\-0\_\-REG@{TCNT2\_\-0\_\-REG}}
\index{TCNT2\_\-0\_\-REG@{TCNT2\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT2\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT2\_\-0\_\-REG~TCNT2}\label{ATmega32U6_8h_6017a10c4de63dbc75e758c7a27802b9}




Definition at line 603 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT2\_\-1\_\-REG@{TCNT2\_\-1\_\-REG}}
\index{TCNT2\_\-1\_\-REG@{TCNT2\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT2\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT2\_\-1\_\-REG~TCNT2}\label{ATmega32U6_8h_51794a4b644fe1b2f53bc1a6046ee5cf}




Definition at line 604 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT2\_\-2\_\-REG@{TCNT2\_\-2\_\-REG}}
\index{TCNT2\_\-2\_\-REG@{TCNT2\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT2\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT2\_\-2\_\-REG~TCNT2}\label{ATmega32U6_8h_292f5b665eeafce0b11b7513960ba9a3}




Definition at line 605 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT2\_\-3\_\-REG@{TCNT2\_\-3\_\-REG}}
\index{TCNT2\_\-3\_\-REG@{TCNT2\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT2\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT2\_\-3\_\-REG~TCNT2}\label{ATmega32U6_8h_1a89a04d5991c84e13700fb4384ab4a8}




Definition at line 606 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT2\_\-4\_\-REG@{TCNT2\_\-4\_\-REG}}
\index{TCNT2\_\-4\_\-REG@{TCNT2\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT2\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT2\_\-4\_\-REG~TCNT2}\label{ATmega32U6_8h_a74c8f8b645d92defcc7f4c8ea7ee98e}




Definition at line 607 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT2\_\-5\_\-REG@{TCNT2\_\-5\_\-REG}}
\index{TCNT2\_\-5\_\-REG@{TCNT2\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT2\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT2\_\-5\_\-REG~TCNT2}\label{ATmega32U6_8h_8903ff23ed80d947a18e127f47df31ca}




Definition at line 608 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT2\_\-6\_\-REG@{TCNT2\_\-6\_\-REG}}
\index{TCNT2\_\-6\_\-REG@{TCNT2\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT2\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT2\_\-6\_\-REG~TCNT2}\label{ATmega32U6_8h_374277b29bf3ea751634c419d67d7df0}




Definition at line 609 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT2\_\-7\_\-REG@{TCNT2\_\-7\_\-REG}}
\index{TCNT2\_\-7\_\-REG@{TCNT2\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT2\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT2\_\-7\_\-REG~TCNT2}\label{ATmega32U6_8h_95d79bf16ec19f1b0e0239f52b26345f}




Definition at line 610 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3H0\_\-REG@{TCNT3H0\_\-REG}}
\index{TCNT3H0\_\-REG@{TCNT3H0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3H0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3H0\_\-REG~TCNT3H}\label{ATmega32U6_8h_05a5eda90544ba610a163fc36204e289}




Definition at line 797 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3H1\_\-REG@{TCNT3H1\_\-REG}}
\index{TCNT3H1\_\-REG@{TCNT3H1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3H1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3H1\_\-REG~TCNT3H}\label{ATmega32U6_8h_87a99e4f67e588af94728626622e3a60}




Definition at line 798 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3H2\_\-REG@{TCNT3H2\_\-REG}}
\index{TCNT3H2\_\-REG@{TCNT3H2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3H2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3H2\_\-REG~TCNT3H}\label{ATmega32U6_8h_9d3eaf425ceb4494acbd34b93c39f4c8}




Definition at line 799 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3H3\_\-REG@{TCNT3H3\_\-REG}}
\index{TCNT3H3\_\-REG@{TCNT3H3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3H3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3H3\_\-REG~TCNT3H}\label{ATmega32U6_8h_e0438a5523b10f92c4e1954dcbde7d3c}




Definition at line 800 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3H4\_\-REG@{TCNT3H4\_\-REG}}
\index{TCNT3H4\_\-REG@{TCNT3H4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3H4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3H4\_\-REG~TCNT3H}\label{ATmega32U6_8h_11c3e306d446d5d32c5185d5408a584a}




Definition at line 801 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3H5\_\-REG@{TCNT3H5\_\-REG}}
\index{TCNT3H5\_\-REG@{TCNT3H5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3H5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3H5\_\-REG~TCNT3H}\label{ATmega32U6_8h_ce8c7a4c8697bde8c04e7647179b44c7}




Definition at line 802 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3H6\_\-REG@{TCNT3H6\_\-REG}}
\index{TCNT3H6\_\-REG@{TCNT3H6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3H6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3H6\_\-REG~TCNT3H}\label{ATmega32U6_8h_de68059fc8e47d0ef6cf249f1b089000}




Definition at line 803 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3H7\_\-REG@{TCNT3H7\_\-REG}}
\index{TCNT3H7\_\-REG@{TCNT3H7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3H7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3H7\_\-REG~TCNT3H}\label{ATmega32U6_8h_814e689234fdf744fd12ed4478d7e4d0}




Definition at line 804 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3L0\_\-REG@{TCNT3L0\_\-REG}}
\index{TCNT3L0\_\-REG@{TCNT3L0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3L0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3L0\_\-REG~TCNT3L}\label{ATmega32U6_8h_13d4942e692ea6970e76a0212b54715c}




Definition at line 817 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3L1\_\-REG@{TCNT3L1\_\-REG}}
\index{TCNT3L1\_\-REG@{TCNT3L1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3L1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3L1\_\-REG~TCNT3L}\label{ATmega32U6_8h_5620285863c7c5ca43dae2e298a67dfe}




Definition at line 818 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3L2\_\-REG@{TCNT3L2\_\-REG}}
\index{TCNT3L2\_\-REG@{TCNT3L2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3L2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3L2\_\-REG~TCNT3L}\label{ATmega32U6_8h_38f2ca425a6c6712395c3b99aa3bbd1d}




Definition at line 819 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3L3\_\-REG@{TCNT3L3\_\-REG}}
\index{TCNT3L3\_\-REG@{TCNT3L3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3L3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3L3\_\-REG~TCNT3L}\label{ATmega32U6_8h_63133f6d475bd8628ab5dbf19da40201}




Definition at line 820 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3L4\_\-REG@{TCNT3L4\_\-REG}}
\index{TCNT3L4\_\-REG@{TCNT3L4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3L4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3L4\_\-REG~TCNT3L}\label{ATmega32U6_8h_0f68c4ec7e01ccb1546c385d914d4c6e}




Definition at line 821 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3L5\_\-REG@{TCNT3L5\_\-REG}}
\index{TCNT3L5\_\-REG@{TCNT3L5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3L5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3L5\_\-REG~TCNT3L}\label{ATmega32U6_8h_d29879b71a34a44f8c7e80a9403659c4}




Definition at line 822 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3L6\_\-REG@{TCNT3L6\_\-REG}}
\index{TCNT3L6\_\-REG@{TCNT3L6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3L6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3L6\_\-REG~TCNT3L}\label{ATmega32U6_8h_2ebbfed506c0d0ead4a33025c01776f4}




Definition at line 823 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCNT3L7\_\-REG@{TCNT3L7\_\-REG}}
\index{TCNT3L7\_\-REG@{TCNT3L7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCNT3L7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCNT3L7\_\-REG~TCNT3L}\label{ATmega32U6_8h_bb2e51b72d652dc30622f31a8a223792}




Definition at line 824 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCR2AUB\_\-REG@{TCR2AUB\_\-REG}}
\index{TCR2AUB\_\-REG@{TCR2AUB\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCR2AUB\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCR2AUB\_\-REG~ASSR}\label{ATmega32U6_8h_3d7f3b1a60a3d13d9db5b4dc2401c922}




Definition at line 442 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TCR2BUB\_\-REG@{TCR2BUB\_\-REG}}
\index{TCR2BUB\_\-REG@{TCR2BUB\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TCR2BUB\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TCR2BUB\_\-REG~ASSR}\label{ATmega32U6_8h_fc14484cff1f7968bcf5414387bf0a9a}




Definition at line 441 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-AVAILABLE@{TIMER0\_\-AVAILABLE}}
\index{TIMER0\_\-AVAILABLE@{TIMER0\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-AVAILABLE}\label{ATmega32U6_8h_668b697532f623f63297039e0cb41619}




Definition at line 105 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-DIV\_\-0@{TIMER0\_\-PRESCALER\_\-DIV\_\-0}}
\index{TIMER0\_\-PRESCALER\_\-DIV\_\-0@{TIMER0\_\-PRESCALER\_\-DIV\_\-0}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-DIV\_\-0]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-DIV\_\-0~0}\label{ATmega32U6_8h_c66ec013fa597474117c127351bedced}




Definition at line 28 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-DIV\_\-1@{TIMER0\_\-PRESCALER\_\-DIV\_\-1}}
\index{TIMER0\_\-PRESCALER\_\-DIV\_\-1@{TIMER0\_\-PRESCALER\_\-DIV\_\-1}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-DIV\_\-1]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-DIV\_\-1~1}\label{ATmega32U6_8h_d60a9603ee404b402b1b7652b419614a}




Definition at line 29 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-DIV\_\-1024@{TIMER0\_\-PRESCALER\_\-DIV\_\-1024}}
\index{TIMER0\_\-PRESCALER\_\-DIV\_\-1024@{TIMER0\_\-PRESCALER\_\-DIV\_\-1024}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-DIV\_\-1024]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-DIV\_\-1024~5}\label{ATmega32U6_8h_972da851dcc6b09922511e1284edc36e}




Definition at line 33 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-DIV\_\-256@{TIMER0\_\-PRESCALER\_\-DIV\_\-256}}
\index{TIMER0\_\-PRESCALER\_\-DIV\_\-256@{TIMER0\_\-PRESCALER\_\-DIV\_\-256}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-DIV\_\-256]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-DIV\_\-256~4}\label{ATmega32U6_8h_668e89427212bdd50a9fc22780627bdd}




Definition at line 32 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-DIV\_\-64@{TIMER0\_\-PRESCALER\_\-DIV\_\-64}}
\index{TIMER0\_\-PRESCALER\_\-DIV\_\-64@{TIMER0\_\-PRESCALER\_\-DIV\_\-64}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-DIV\_\-64]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-DIV\_\-64~3}\label{ATmega32U6_8h_1ff030cae6ddd509d1dc8a34ef020a10}




Definition at line 31 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-DIV\_\-8@{TIMER0\_\-PRESCALER\_\-DIV\_\-8}}
\index{TIMER0\_\-PRESCALER\_\-DIV\_\-8@{TIMER0\_\-PRESCALER\_\-DIV\_\-8}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-DIV\_\-8]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-DIV\_\-8~2}\label{ATmega32U6_8h_83262dc8806bd35b95e39c7f4ad660dc}




Definition at line 30 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-DIV\_\-FALL@{TIMER0\_\-PRESCALER\_\-DIV\_\-FALL}}
\index{TIMER0\_\-PRESCALER\_\-DIV\_\-FALL@{TIMER0\_\-PRESCALER\_\-DIV\_\-FALL}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-DIV\_\-FALL]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-DIV\_\-FALL~6}\label{ATmega32U6_8h_c67439191efe80613cbefa35399a776f}




Definition at line 34 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-DIV\_\-RISE@{TIMER0\_\-PRESCALER\_\-DIV\_\-RISE}}
\index{TIMER0\_\-PRESCALER\_\-DIV\_\-RISE@{TIMER0\_\-PRESCALER\_\-DIV\_\-RISE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-DIV\_\-RISE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-DIV\_\-RISE~7}\label{ATmega32U6_8h_5deaad711ed0f159d7bf19beb594c577}




Definition at line 35 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-REG\_\-0@{TIMER0\_\-PRESCALER\_\-REG\_\-0}}
\index{TIMER0\_\-PRESCALER\_\-REG\_\-0@{TIMER0\_\-PRESCALER\_\-REG\_\-0}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-REG\_\-0]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-REG\_\-0~0}\label{ATmega32U6_8h_8143ac91326ffcd96d2acd33924cc3aa}




Definition at line 37 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-REG\_\-1@{TIMER0\_\-PRESCALER\_\-REG\_\-1}}
\index{TIMER0\_\-PRESCALER\_\-REG\_\-1@{TIMER0\_\-PRESCALER\_\-REG\_\-1}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-REG\_\-1]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-REG\_\-1~1}\label{ATmega32U6_8h_c88125b4d75100eb292b9a366c4bd5c6}




Definition at line 38 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-REG\_\-2@{TIMER0\_\-PRESCALER\_\-REG\_\-2}}
\index{TIMER0\_\-PRESCALER\_\-REG\_\-2@{TIMER0\_\-PRESCALER\_\-REG\_\-2}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-REG\_\-2]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-REG\_\-2~8}\label{ATmega32U6_8h_655e86d55af2afe0033b3d8bf2aceb20}




Definition at line 39 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-REG\_\-3@{TIMER0\_\-PRESCALER\_\-REG\_\-3}}
\index{TIMER0\_\-PRESCALER\_\-REG\_\-3@{TIMER0\_\-PRESCALER\_\-REG\_\-3}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-REG\_\-3]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-REG\_\-3~64}\label{ATmega32U6_8h_cae86407c26e1b79197011862a53b366}




Definition at line 40 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-REG\_\-4@{TIMER0\_\-PRESCALER\_\-REG\_\-4}}
\index{TIMER0\_\-PRESCALER\_\-REG\_\-4@{TIMER0\_\-PRESCALER\_\-REG\_\-4}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-REG\_\-4]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-REG\_\-4~256}\label{ATmega32U6_8h_6c2a877eb19568271dd956d347d22372}




Definition at line 41 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-REG\_\-5@{TIMER0\_\-PRESCALER\_\-REG\_\-5}}
\index{TIMER0\_\-PRESCALER\_\-REG\_\-5@{TIMER0\_\-PRESCALER\_\-REG\_\-5}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-REG\_\-5]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-REG\_\-5~1024}\label{ATmega32U6_8h_042c7933f29f1014ba3277b5103e6186}




Definition at line 42 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-REG\_\-6@{TIMER0\_\-PRESCALER\_\-REG\_\-6}}
\index{TIMER0\_\-PRESCALER\_\-REG\_\-6@{TIMER0\_\-PRESCALER\_\-REG\_\-6}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-REG\_\-6]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-REG\_\-6~-1}\label{ATmega32U6_8h_95d957994107d6a2b5c7f6fa9453322d}




Definition at line 43 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0\_\-PRESCALER\_\-REG\_\-7@{TIMER0\_\-PRESCALER\_\-REG\_\-7}}
\index{TIMER0\_\-PRESCALER\_\-REG\_\-7@{TIMER0\_\-PRESCALER\_\-REG\_\-7}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0\_\-PRESCALER\_\-REG\_\-7]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0\_\-PRESCALER\_\-REG\_\-7~-2}\label{ATmega32U6_8h_0b5413f6b78514d3aa97adbc8be48895}




Definition at line 44 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0A\_\-AVAILABLE@{TIMER0A\_\-AVAILABLE}}
\index{TIMER0A\_\-AVAILABLE@{TIMER0A\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0A\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0A\_\-AVAILABLE}\label{ATmega32U6_8h_3cc243a0fd45f898830730fbfc85db5b}




Definition at line 106 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER0B\_\-AVAILABLE@{TIMER0B\_\-AVAILABLE}}
\index{TIMER0B\_\-AVAILABLE@{TIMER0B\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER0B\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER0B\_\-AVAILABLE}\label{ATmega32U6_8h_3a9fca32601aee812eddafca2bb5ba17}




Definition at line 107 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-AVAILABLE@{TIMER1\_\-AVAILABLE}}
\index{TIMER1\_\-AVAILABLE@{TIMER1\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-AVAILABLE}\label{ATmega32U6_8h_6d3318366877ea390df999396fa2231f}




Definition at line 108 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-DIV\_\-0@{TIMER1\_\-PRESCALER\_\-DIV\_\-0}}
\index{TIMER1\_\-PRESCALER\_\-DIV\_\-0@{TIMER1\_\-PRESCALER\_\-DIV\_\-0}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-DIV\_\-0]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-DIV\_\-0~0}\label{ATmega32U6_8h_f1c1d4d979d1f563be962db8b145fbbf}




Definition at line 47 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-DIV\_\-1@{TIMER1\_\-PRESCALER\_\-DIV\_\-1}}
\index{TIMER1\_\-PRESCALER\_\-DIV\_\-1@{TIMER1\_\-PRESCALER\_\-DIV\_\-1}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-DIV\_\-1]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-DIV\_\-1~1}\label{ATmega32U6_8h_00903327b93ba9aa8e5b61d970854436}




Definition at line 48 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-DIV\_\-1024@{TIMER1\_\-PRESCALER\_\-DIV\_\-1024}}
\index{TIMER1\_\-PRESCALER\_\-DIV\_\-1024@{TIMER1\_\-PRESCALER\_\-DIV\_\-1024}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-DIV\_\-1024]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-DIV\_\-1024~5}\label{ATmega32U6_8h_0ad10baa71b1ca91c19048016f05017c}




Definition at line 52 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-DIV\_\-256@{TIMER1\_\-PRESCALER\_\-DIV\_\-256}}
\index{TIMER1\_\-PRESCALER\_\-DIV\_\-256@{TIMER1\_\-PRESCALER\_\-DIV\_\-256}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-DIV\_\-256]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-DIV\_\-256~4}\label{ATmega32U6_8h_39b2b2e4d200fcfc3d3e37c639509709}




Definition at line 51 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-DIV\_\-64@{TIMER1\_\-PRESCALER\_\-DIV\_\-64}}
\index{TIMER1\_\-PRESCALER\_\-DIV\_\-64@{TIMER1\_\-PRESCALER\_\-DIV\_\-64}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-DIV\_\-64]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-DIV\_\-64~3}\label{ATmega32U6_8h_d45561073141104680888376d87c045c}




Definition at line 50 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-DIV\_\-8@{TIMER1\_\-PRESCALER\_\-DIV\_\-8}}
\index{TIMER1\_\-PRESCALER\_\-DIV\_\-8@{TIMER1\_\-PRESCALER\_\-DIV\_\-8}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-DIV\_\-8]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-DIV\_\-8~2}\label{ATmega32U6_8h_8d2fa60e55354b71578efeebc62c2041}




Definition at line 49 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-DIV\_\-FALL@{TIMER1\_\-PRESCALER\_\-DIV\_\-FALL}}
\index{TIMER1\_\-PRESCALER\_\-DIV\_\-FALL@{TIMER1\_\-PRESCALER\_\-DIV\_\-FALL}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-DIV\_\-FALL]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-DIV\_\-FALL~6}\label{ATmega32U6_8h_7b199b12c9d8ba4918086bcade103877}




Definition at line 53 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-DIV\_\-RISE@{TIMER1\_\-PRESCALER\_\-DIV\_\-RISE}}
\index{TIMER1\_\-PRESCALER\_\-DIV\_\-RISE@{TIMER1\_\-PRESCALER\_\-DIV\_\-RISE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-DIV\_\-RISE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-DIV\_\-RISE~7}\label{ATmega32U6_8h_c93d79b825cdef098fda6da0cb4ac583}




Definition at line 54 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-REG\_\-0@{TIMER1\_\-PRESCALER\_\-REG\_\-0}}
\index{TIMER1\_\-PRESCALER\_\-REG\_\-0@{TIMER1\_\-PRESCALER\_\-REG\_\-0}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-REG\_\-0]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-REG\_\-0~0}\label{ATmega32U6_8h_c09431aad889913350bf739bd1e551f8}




Definition at line 56 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-REG\_\-1@{TIMER1\_\-PRESCALER\_\-REG\_\-1}}
\index{TIMER1\_\-PRESCALER\_\-REG\_\-1@{TIMER1\_\-PRESCALER\_\-REG\_\-1}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-REG\_\-1]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-REG\_\-1~1}\label{ATmega32U6_8h_3ca66f6a9cf2c7dd589bf1f839b8ca53}




Definition at line 57 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-REG\_\-2@{TIMER1\_\-PRESCALER\_\-REG\_\-2}}
\index{TIMER1\_\-PRESCALER\_\-REG\_\-2@{TIMER1\_\-PRESCALER\_\-REG\_\-2}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-REG\_\-2]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-REG\_\-2~8}\label{ATmega32U6_8h_609a70f0a21cc0402185cb2bc3987c98}




Definition at line 58 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-REG\_\-3@{TIMER1\_\-PRESCALER\_\-REG\_\-3}}
\index{TIMER1\_\-PRESCALER\_\-REG\_\-3@{TIMER1\_\-PRESCALER\_\-REG\_\-3}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-REG\_\-3]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-REG\_\-3~64}\label{ATmega32U6_8h_dc43c349d2e4c5bac8815c65cb54c547}




Definition at line 59 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-REG\_\-4@{TIMER1\_\-PRESCALER\_\-REG\_\-4}}
\index{TIMER1\_\-PRESCALER\_\-REG\_\-4@{TIMER1\_\-PRESCALER\_\-REG\_\-4}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-REG\_\-4]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-REG\_\-4~256}\label{ATmega32U6_8h_b5bf5eadef1837eec749d1fc167e30a0}




Definition at line 60 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-REG\_\-5@{TIMER1\_\-PRESCALER\_\-REG\_\-5}}
\index{TIMER1\_\-PRESCALER\_\-REG\_\-5@{TIMER1\_\-PRESCALER\_\-REG\_\-5}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-REG\_\-5]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-REG\_\-5~1024}\label{ATmega32U6_8h_7b96ecfe303fdcc1c5bf136fe7a961ed}




Definition at line 61 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-REG\_\-6@{TIMER1\_\-PRESCALER\_\-REG\_\-6}}
\index{TIMER1\_\-PRESCALER\_\-REG\_\-6@{TIMER1\_\-PRESCALER\_\-REG\_\-6}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-REG\_\-6]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-REG\_\-6~-1}\label{ATmega32U6_8h_d600912867da52934f54803c6fbf8c6c}




Definition at line 62 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1\_\-PRESCALER\_\-REG\_\-7@{TIMER1\_\-PRESCALER\_\-REG\_\-7}}
\index{TIMER1\_\-PRESCALER\_\-REG\_\-7@{TIMER1\_\-PRESCALER\_\-REG\_\-7}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1\_\-PRESCALER\_\-REG\_\-7]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1\_\-PRESCALER\_\-REG\_\-7~-2}\label{ATmega32U6_8h_b9b860fdea605509ceca7a558534f127}




Definition at line 63 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1A\_\-AVAILABLE@{TIMER1A\_\-AVAILABLE}}
\index{TIMER1A\_\-AVAILABLE@{TIMER1A\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1A\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1A\_\-AVAILABLE}\label{ATmega32U6_8h_6526dc8015a1b35402fb96c638a26d53}




Definition at line 109 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1B\_\-AVAILABLE@{TIMER1B\_\-AVAILABLE}}
\index{TIMER1B\_\-AVAILABLE@{TIMER1B\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1B\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1B\_\-AVAILABLE}\label{ATmega32U6_8h_6a0280541886cc87863f94b8c9fc11d3}




Definition at line 110 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER1C\_\-AVAILABLE@{TIMER1C\_\-AVAILABLE}}
\index{TIMER1C\_\-AVAILABLE@{TIMER1C\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER1C\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER1C\_\-AVAILABLE}\label{ATmega32U6_8h_7f2fcbda12cf7b4593e06a08694fb243}




Definition at line 111 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-AVAILABLE@{TIMER2\_\-AVAILABLE}}
\index{TIMER2\_\-AVAILABLE@{TIMER2\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-AVAILABLE}\label{ATmega32U6_8h_c9eab569932eb65263c8c469e9f24b84}




Definition at line 112 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-DIV\_\-0@{TIMER2\_\-PRESCALER\_\-DIV\_\-0}}
\index{TIMER2\_\-PRESCALER\_\-DIV\_\-0@{TIMER2\_\-PRESCALER\_\-DIV\_\-0}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-DIV\_\-0]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-DIV\_\-0~0}\label{ATmega32U6_8h_cc62b793f80fd270e9a2231bb514a7a5}




Definition at line 66 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-DIV\_\-1@{TIMER2\_\-PRESCALER\_\-DIV\_\-1}}
\index{TIMER2\_\-PRESCALER\_\-DIV\_\-1@{TIMER2\_\-PRESCALER\_\-DIV\_\-1}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-DIV\_\-1]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-DIV\_\-1~1}\label{ATmega32U6_8h_1e8cab46c7be93dad316e3b095063795}




Definition at line 67 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-DIV\_\-1024@{TIMER2\_\-PRESCALER\_\-DIV\_\-1024}}
\index{TIMER2\_\-PRESCALER\_\-DIV\_\-1024@{TIMER2\_\-PRESCALER\_\-DIV\_\-1024}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-DIV\_\-1024]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-DIV\_\-1024~7}\label{ATmega32U6_8h_5111d3de9efa003a5f143caad76abda7}




Definition at line 73 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-DIV\_\-128@{TIMER2\_\-PRESCALER\_\-DIV\_\-128}}
\index{TIMER2\_\-PRESCALER\_\-DIV\_\-128@{TIMER2\_\-PRESCALER\_\-DIV\_\-128}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-DIV\_\-128]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-DIV\_\-128~5}\label{ATmega32U6_8h_8b01649f7239ede4d257bd73ccd55838}




Definition at line 71 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-DIV\_\-256@{TIMER2\_\-PRESCALER\_\-DIV\_\-256}}
\index{TIMER2\_\-PRESCALER\_\-DIV\_\-256@{TIMER2\_\-PRESCALER\_\-DIV\_\-256}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-DIV\_\-256]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-DIV\_\-256~6}\label{ATmega32U6_8h_9ae4a2aef4d71a7bd8c435b13d30096f}




Definition at line 72 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-DIV\_\-32@{TIMER2\_\-PRESCALER\_\-DIV\_\-32}}
\index{TIMER2\_\-PRESCALER\_\-DIV\_\-32@{TIMER2\_\-PRESCALER\_\-DIV\_\-32}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-DIV\_\-32]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-DIV\_\-32~3}\label{ATmega32U6_8h_d496a3e8a59410a18f26b3d1d72c1ec6}




Definition at line 69 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-DIV\_\-64@{TIMER2\_\-PRESCALER\_\-DIV\_\-64}}
\index{TIMER2\_\-PRESCALER\_\-DIV\_\-64@{TIMER2\_\-PRESCALER\_\-DIV\_\-64}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-DIV\_\-64]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-DIV\_\-64~4}\label{ATmega32U6_8h_249dfa67a9acd1c3c858f16c1f522ed5}




Definition at line 70 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-DIV\_\-8@{TIMER2\_\-PRESCALER\_\-DIV\_\-8}}
\index{TIMER2\_\-PRESCALER\_\-DIV\_\-8@{TIMER2\_\-PRESCALER\_\-DIV\_\-8}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-DIV\_\-8]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-DIV\_\-8~2}\label{ATmega32U6_8h_dc2531b40a185b4d484e406d508db4b5}




Definition at line 68 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-REG\_\-0@{TIMER2\_\-PRESCALER\_\-REG\_\-0}}
\index{TIMER2\_\-PRESCALER\_\-REG\_\-0@{TIMER2\_\-PRESCALER\_\-REG\_\-0}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-REG\_\-0]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-REG\_\-0~0}\label{ATmega32U6_8h_0a97ef1f35ae1fdea803d608d953a089}




Definition at line 75 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-REG\_\-1@{TIMER2\_\-PRESCALER\_\-REG\_\-1}}
\index{TIMER2\_\-PRESCALER\_\-REG\_\-1@{TIMER2\_\-PRESCALER\_\-REG\_\-1}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-REG\_\-1]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-REG\_\-1~1}\label{ATmega32U6_8h_bf0e010c8383b8ea2526a203d129ce5e}




Definition at line 76 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-REG\_\-2@{TIMER2\_\-PRESCALER\_\-REG\_\-2}}
\index{TIMER2\_\-PRESCALER\_\-REG\_\-2@{TIMER2\_\-PRESCALER\_\-REG\_\-2}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-REG\_\-2]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-REG\_\-2~8}\label{ATmega32U6_8h_2c9c5552442746b51602270a4046f048}




Definition at line 77 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-REG\_\-3@{TIMER2\_\-PRESCALER\_\-REG\_\-3}}
\index{TIMER2\_\-PRESCALER\_\-REG\_\-3@{TIMER2\_\-PRESCALER\_\-REG\_\-3}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-REG\_\-3]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-REG\_\-3~32}\label{ATmega32U6_8h_73626a5804747f04a92c16981bda3975}




Definition at line 78 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-REG\_\-4@{TIMER2\_\-PRESCALER\_\-REG\_\-4}}
\index{TIMER2\_\-PRESCALER\_\-REG\_\-4@{TIMER2\_\-PRESCALER\_\-REG\_\-4}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-REG\_\-4]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-REG\_\-4~64}\label{ATmega32U6_8h_08894b394e97e5e2cf2eb5305ba34807}




Definition at line 79 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-REG\_\-5@{TIMER2\_\-PRESCALER\_\-REG\_\-5}}
\index{TIMER2\_\-PRESCALER\_\-REG\_\-5@{TIMER2\_\-PRESCALER\_\-REG\_\-5}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-REG\_\-5]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-REG\_\-5~128}\label{ATmega32U6_8h_4f0e4f8f412304b559f11a8ce2ab8dff}




Definition at line 80 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-REG\_\-6@{TIMER2\_\-PRESCALER\_\-REG\_\-6}}
\index{TIMER2\_\-PRESCALER\_\-REG\_\-6@{TIMER2\_\-PRESCALER\_\-REG\_\-6}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-REG\_\-6]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-REG\_\-6~256}\label{ATmega32U6_8h_1dd4065780638cfb4bb633c9d154bf57}




Definition at line 81 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2\_\-PRESCALER\_\-REG\_\-7@{TIMER2\_\-PRESCALER\_\-REG\_\-7}}
\index{TIMER2\_\-PRESCALER\_\-REG\_\-7@{TIMER2\_\-PRESCALER\_\-REG\_\-7}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2\_\-PRESCALER\_\-REG\_\-7]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2\_\-PRESCALER\_\-REG\_\-7~1024}\label{ATmega32U6_8h_65d422fa1dab8db1b5889c49a2373c01}




Definition at line 82 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2A\_\-AVAILABLE@{TIMER2A\_\-AVAILABLE}}
\index{TIMER2A\_\-AVAILABLE@{TIMER2A\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2A\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2A\_\-AVAILABLE}\label{ATmega32U6_8h_2bd7d0a5b037b6656dc8e947880ae6b8}




Definition at line 113 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER2B\_\-AVAILABLE@{TIMER2B\_\-AVAILABLE}}
\index{TIMER2B\_\-AVAILABLE@{TIMER2B\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER2B\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER2B\_\-AVAILABLE}\label{ATmega32U6_8h_264ec118a83e4d6b5a949aa600bad0c0}




Definition at line 114 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-AVAILABLE@{TIMER3\_\-AVAILABLE}}
\index{TIMER3\_\-AVAILABLE@{TIMER3\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-AVAILABLE}\label{ATmega32U6_8h_ea082bb70d3890b3ce384d6b2f8588f2}




Definition at line 115 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-DIV\_\-0@{TIMER3\_\-PRESCALER\_\-DIV\_\-0}}
\index{TIMER3\_\-PRESCALER\_\-DIV\_\-0@{TIMER3\_\-PRESCALER\_\-DIV\_\-0}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-DIV\_\-0]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-DIV\_\-0~0}\label{ATmega32U6_8h_ceb6005569dae2a80b1585d07d88e2c4}




Definition at line 85 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-DIV\_\-1@{TIMER3\_\-PRESCALER\_\-DIV\_\-1}}
\index{TIMER3\_\-PRESCALER\_\-DIV\_\-1@{TIMER3\_\-PRESCALER\_\-DIV\_\-1}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-DIV\_\-1]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-DIV\_\-1~1}\label{ATmega32U6_8h_3a89a3b1145287c1961d636a529f8e91}




Definition at line 86 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-DIV\_\-1024@{TIMER3\_\-PRESCALER\_\-DIV\_\-1024}}
\index{TIMER3\_\-PRESCALER\_\-DIV\_\-1024@{TIMER3\_\-PRESCALER\_\-DIV\_\-1024}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-DIV\_\-1024]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-DIV\_\-1024~5}\label{ATmega32U6_8h_47239ad1e513afd83a1c3695bbe00556}




Definition at line 90 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-DIV\_\-256@{TIMER3\_\-PRESCALER\_\-DIV\_\-256}}
\index{TIMER3\_\-PRESCALER\_\-DIV\_\-256@{TIMER3\_\-PRESCALER\_\-DIV\_\-256}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-DIV\_\-256]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-DIV\_\-256~4}\label{ATmega32U6_8h_707ab817d62b5d25467272e6298d0d74}




Definition at line 89 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-DIV\_\-64@{TIMER3\_\-PRESCALER\_\-DIV\_\-64}}
\index{TIMER3\_\-PRESCALER\_\-DIV\_\-64@{TIMER3\_\-PRESCALER\_\-DIV\_\-64}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-DIV\_\-64]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-DIV\_\-64~3}\label{ATmega32U6_8h_860cccc1bf8563b4a56ed17741280a62}




Definition at line 88 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-DIV\_\-8@{TIMER3\_\-PRESCALER\_\-DIV\_\-8}}
\index{TIMER3\_\-PRESCALER\_\-DIV\_\-8@{TIMER3\_\-PRESCALER\_\-DIV\_\-8}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-DIV\_\-8]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-DIV\_\-8~2}\label{ATmega32U6_8h_335d5acf3763e7e5d771a511e93f33da}




Definition at line 87 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-DIV\_\-FALL@{TIMER3\_\-PRESCALER\_\-DIV\_\-FALL}}
\index{TIMER3\_\-PRESCALER\_\-DIV\_\-FALL@{TIMER3\_\-PRESCALER\_\-DIV\_\-FALL}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-DIV\_\-FALL]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-DIV\_\-FALL~6}\label{ATmega32U6_8h_252b4de1c7f6637720819320262e6eea}




Definition at line 91 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-DIV\_\-RISE@{TIMER3\_\-PRESCALER\_\-DIV\_\-RISE}}
\index{TIMER3\_\-PRESCALER\_\-DIV\_\-RISE@{TIMER3\_\-PRESCALER\_\-DIV\_\-RISE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-DIV\_\-RISE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-DIV\_\-RISE~7}\label{ATmega32U6_8h_1d4c4fdda7b5d3c09542107fc970f27f}




Definition at line 92 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-REG\_\-0@{TIMER3\_\-PRESCALER\_\-REG\_\-0}}
\index{TIMER3\_\-PRESCALER\_\-REG\_\-0@{TIMER3\_\-PRESCALER\_\-REG\_\-0}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-REG\_\-0]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-REG\_\-0~0}\label{ATmega32U6_8h_1407a50641b58a61204f079511025e36}




Definition at line 94 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-REG\_\-1@{TIMER3\_\-PRESCALER\_\-REG\_\-1}}
\index{TIMER3\_\-PRESCALER\_\-REG\_\-1@{TIMER3\_\-PRESCALER\_\-REG\_\-1}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-REG\_\-1]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-REG\_\-1~1}\label{ATmega32U6_8h_51340a653e3fedb4e08e00c7bd9a5a99}




Definition at line 95 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-REG\_\-2@{TIMER3\_\-PRESCALER\_\-REG\_\-2}}
\index{TIMER3\_\-PRESCALER\_\-REG\_\-2@{TIMER3\_\-PRESCALER\_\-REG\_\-2}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-REG\_\-2]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-REG\_\-2~8}\label{ATmega32U6_8h_e7ca87631030d49acbab67fba3e42795}




Definition at line 96 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-REG\_\-3@{TIMER3\_\-PRESCALER\_\-REG\_\-3}}
\index{TIMER3\_\-PRESCALER\_\-REG\_\-3@{TIMER3\_\-PRESCALER\_\-REG\_\-3}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-REG\_\-3]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-REG\_\-3~64}\label{ATmega32U6_8h_f18a75c70508f430571b8563a49b5b1a}




Definition at line 97 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-REG\_\-4@{TIMER3\_\-PRESCALER\_\-REG\_\-4}}
\index{TIMER3\_\-PRESCALER\_\-REG\_\-4@{TIMER3\_\-PRESCALER\_\-REG\_\-4}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-REG\_\-4]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-REG\_\-4~256}\label{ATmega32U6_8h_4a1a034f3b9707bbe69f75cbe4695996}




Definition at line 98 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-REG\_\-5@{TIMER3\_\-PRESCALER\_\-REG\_\-5}}
\index{TIMER3\_\-PRESCALER\_\-REG\_\-5@{TIMER3\_\-PRESCALER\_\-REG\_\-5}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-REG\_\-5]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-REG\_\-5~1024}\label{ATmega32U6_8h_27060505c50caffa7b5f3c4e0da280e7}




Definition at line 99 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-REG\_\-6@{TIMER3\_\-PRESCALER\_\-REG\_\-6}}
\index{TIMER3\_\-PRESCALER\_\-REG\_\-6@{TIMER3\_\-PRESCALER\_\-REG\_\-6}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-REG\_\-6]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-REG\_\-6~-1}\label{ATmega32U6_8h_11fdf6e2ca48b3d802bc4a985405effc}




Definition at line 100 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3\_\-PRESCALER\_\-REG\_\-7@{TIMER3\_\-PRESCALER\_\-REG\_\-7}}
\index{TIMER3\_\-PRESCALER\_\-REG\_\-7@{TIMER3\_\-PRESCALER\_\-REG\_\-7}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3\_\-PRESCALER\_\-REG\_\-7]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3\_\-PRESCALER\_\-REG\_\-7~-2}\label{ATmega32U6_8h_7f1658e04d4e7e7fbb002730e1c10f79}




Definition at line 101 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3A\_\-AVAILABLE@{TIMER3A\_\-AVAILABLE}}
\index{TIMER3A\_\-AVAILABLE@{TIMER3A\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3A\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3A\_\-AVAILABLE}\label{ATmega32U6_8h_3a4304100e90df7158a3a721bbfb44c1}




Definition at line 116 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3B\_\-AVAILABLE@{TIMER3B\_\-AVAILABLE}}
\index{TIMER3B\_\-AVAILABLE@{TIMER3B\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3B\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3B\_\-AVAILABLE}\label{ATmega32U6_8h_f7cbd5a789682421627d8e23b18daba9}




Definition at line 117 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TIMER3C\_\-AVAILABLE@{TIMER3C\_\-AVAILABLE}}
\index{TIMER3C\_\-AVAILABLE@{TIMER3C\_\-AVAILABLE}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TIMER3C\_\-AVAILABLE]{\setlength{\rightskip}{0pt plus 5cm}\#define TIMER3C\_\-AVAILABLE}\label{ATmega32U6_8h_db3ff7d3e0727ea46fe1771c4a9f56ed}




Definition at line 118 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TOIE0\_\-REG@{TOIE0\_\-REG}}
\index{TOIE0\_\-REG@{TOIE0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TOIE0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TOIE0\_\-REG~TIMSK0}\label{ATmega32U6_8h_5a635571a56f1fb59e3b884aa073d512}




Definition at line 1240 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TOIE1\_\-REG@{TOIE1\_\-REG}}
\index{TOIE1\_\-REG@{TOIE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TOIE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TOIE1\_\-REG~TIMSK1}\label{ATmega32U6_8h_72a162fa56af8033ce7ef5691d9c0800}




Definition at line 1245 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TOIE2\_\-REG@{TOIE2\_\-REG}}
\index{TOIE2\_\-REG@{TOIE2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TOIE2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TOIE2\_\-REG~TIMSK2}\label{ATmega32U6_8h_ae695e6a007d19362276b91b43c98121}




Definition at line 1228 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TOIE3\_\-REG@{TOIE3\_\-REG}}
\index{TOIE3\_\-REG@{TOIE3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TOIE3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TOIE3\_\-REG~TIMSK3}\label{ATmega32U6_8h_57949ac13e0f5804b998cb0a704b4c09}




Definition at line 1233 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TOV0\_\-REG@{TOV0\_\-REG}}
\index{TOV0\_\-REG@{TOV0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TOV0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TOV0\_\-REG~TIFR0}\label{ATmega32U6_8h_09d5f62889c143cea3fa808f861dfb42}




Definition at line 1365 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TOV1\_\-REG@{TOV1\_\-REG}}
\index{TOV1\_\-REG@{TOV1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TOV1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TOV1\_\-REG~TIFR1}\label{ATmega32U6_8h_790eacbd141db2ee7206f580472434d0}




Definition at line 680 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TOV2\_\-REG@{TOV2\_\-REG}}
\index{TOV2\_\-REG@{TOV2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TOV2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TOV2\_\-REG~TIFR2}\label{ATmega32U6_8h_290e6bdb5d8cc603ca859af25b7e63b1}




Definition at line 658 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TOV3\_\-REG@{TOV3\_\-REG}}
\index{TOV3\_\-REG@{TOV3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TOV3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TOV3\_\-REG~TIFR3}\label{ATmega32U6_8h_379a012aa69d8d05f65cb3ffff3be0d2}




Definition at line 663 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TSM\_\-REG@{TSM\_\-REG}}
\index{TSM\_\-REG@{TSM\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TSM\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TSM\_\-REG~GTCCR}\label{ATmega32U6_8h_632ccca1330e774c17d0222764857134}




Definition at line 729 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWA0\_\-REG@{TWA0\_\-REG}}
\index{TWA0\_\-REG@{TWA0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWA0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWA0\_\-REG~TWAR}\label{ATmega32U6_8h_1a0e38420a034a62f6897287dcf56499}




Definition at line 624 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWA1\_\-REG@{TWA1\_\-REG}}
\index{TWA1\_\-REG@{TWA1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWA1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWA1\_\-REG~TWAR}\label{ATmega32U6_8h_fc29b9bcdba3841a69927f6dddc2fca6}




Definition at line 625 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWA2\_\-REG@{TWA2\_\-REG}}
\index{TWA2\_\-REG@{TWA2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWA2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWA2\_\-REG~TWAR}\label{ATmega32U6_8h_43b1d6907774b3461eed60572d049a62}




Definition at line 626 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWA3\_\-REG@{TWA3\_\-REG}}
\index{TWA3\_\-REG@{TWA3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWA3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWA3\_\-REG~TWAR}\label{ATmega32U6_8h_305511cde71c015669574514017e3c00}




Definition at line 627 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWA4\_\-REG@{TWA4\_\-REG}}
\index{TWA4\_\-REG@{TWA4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWA4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWA4\_\-REG~TWAR}\label{ATmega32U6_8h_1ac37d7ff58e663f09abef2e9eeea4dd}




Definition at line 628 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWA5\_\-REG@{TWA5\_\-REG}}
\index{TWA5\_\-REG@{TWA5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWA5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWA5\_\-REG~TWAR}\label{ATmega32U6_8h_c4fb46413e2af6f80f1d0c260a598008}




Definition at line 629 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWA6\_\-REG@{TWA6\_\-REG}}
\index{TWA6\_\-REG@{TWA6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWA6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWA6\_\-REG~TWAR}\label{ATmega32U6_8h_30fd6fd2e2fe3d796daa4c78a91cc771}




Definition at line 630 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWAM0\_\-REG@{TWAM0\_\-REG}}
\index{TWAM0\_\-REG@{TWAM0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWAM0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWAM0\_\-REG~TWAMR}\label{ATmega32U6_8h_95b32075ecfca5f4c50ae617eb259550}




Definition at line 1044 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWAM1\_\-REG@{TWAM1\_\-REG}}
\index{TWAM1\_\-REG@{TWAM1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWAM1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWAM1\_\-REG~TWAMR}\label{ATmega32U6_8h_4cb85b48fb7dcde8b0f645a9294ce6a5}




Definition at line 1045 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWAM2\_\-REG@{TWAM2\_\-REG}}
\index{TWAM2\_\-REG@{TWAM2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWAM2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWAM2\_\-REG~TWAMR}\label{ATmega32U6_8h_abd2e3224ab9d052923e53f4951d48ff}




Definition at line 1046 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWAM3\_\-REG@{TWAM3\_\-REG}}
\index{TWAM3\_\-REG@{TWAM3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWAM3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWAM3\_\-REG~TWAMR}\label{ATmega32U6_8h_5ecbca4c463741a6214e1a03b6e303dc}




Definition at line 1047 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWAM4\_\-REG@{TWAM4\_\-REG}}
\index{TWAM4\_\-REG@{TWAM4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWAM4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWAM4\_\-REG~TWAMR}\label{ATmega32U6_8h_e4c38ec53cdd5f3a6fcc4982af13ca8e}




Definition at line 1048 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWAM5\_\-REG@{TWAM5\_\-REG}}
\index{TWAM5\_\-REG@{TWAM5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWAM5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWAM5\_\-REG~TWAMR}\label{ATmega32U6_8h_189157aafba758bbe678caa4c0607437}




Definition at line 1049 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWAM6\_\-REG@{TWAM6\_\-REG}}
\index{TWAM6\_\-REG@{TWAM6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWAM6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWAM6\_\-REG~TWAMR}\label{ATmega32U6_8h_fe0b79b55406182671e246e8c2c8e8b5}




Definition at line 1050 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWBR0\_\-REG@{TWBR0\_\-REG}}
\index{TWBR0\_\-REG@{TWBR0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWBR0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWBR0\_\-REG~TWBR}\label{ATmega32U6_8h_2c3248e632f67474e0cc8b75b9522d17}




Definition at line 733 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWBR1\_\-REG@{TWBR1\_\-REG}}
\index{TWBR1\_\-REG@{TWBR1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWBR1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWBR1\_\-REG~TWBR}\label{ATmega32U6_8h_6d881eb4e39ae66c50271b3af989230a}




Definition at line 734 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWBR2\_\-REG@{TWBR2\_\-REG}}
\index{TWBR2\_\-REG@{TWBR2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWBR2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWBR2\_\-REG~TWBR}\label{ATmega32U6_8h_b384ae85eac88a85bdcd192b41ff2f6a}




Definition at line 735 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWBR3\_\-REG@{TWBR3\_\-REG}}
\index{TWBR3\_\-REG@{TWBR3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWBR3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWBR3\_\-REG~TWBR}\label{ATmega32U6_8h_e50d13ed20901c9c72c4e63e3d7fad04}




Definition at line 736 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWBR4\_\-REG@{TWBR4\_\-REG}}
\index{TWBR4\_\-REG@{TWBR4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWBR4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWBR4\_\-REG~TWBR}\label{ATmega32U6_8h_df945bf290de24cfd55e8528a35a45f9}




Definition at line 737 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWBR5\_\-REG@{TWBR5\_\-REG}}
\index{TWBR5\_\-REG@{TWBR5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWBR5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWBR5\_\-REG~TWBR}\label{ATmega32U6_8h_538ccc3fd51667f02ea9fcf60671c766}




Definition at line 738 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWBR6\_\-REG@{TWBR6\_\-REG}}
\index{TWBR6\_\-REG@{TWBR6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWBR6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWBR6\_\-REG~TWBR}\label{ATmega32U6_8h_0958d2a95319b2a461ee7ca690ea0ce4}




Definition at line 739 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWBR7\_\-REG@{TWBR7\_\-REG}}
\index{TWBR7\_\-REG@{TWBR7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWBR7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWBR7\_\-REG~TWBR}\label{ATmega32U6_8h_38df7853beb30664f71fd7a6008cd746}




Definition at line 740 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWD0\_\-REG@{TWD0\_\-REG}}
\index{TWD0\_\-REG@{TWD0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWD0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWD0\_\-REG~TWDR}\label{ATmega32U6_8h_b0751fda327a1f870c3a4249bc9e5750}




Definition at line 1029 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWD1\_\-REG@{TWD1\_\-REG}}
\index{TWD1\_\-REG@{TWD1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWD1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWD1\_\-REG~TWDR}\label{ATmega32U6_8h_033dfd7729a97c1fb98354a926dbb2df}




Definition at line 1030 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWD2\_\-REG@{TWD2\_\-REG}}
\index{TWD2\_\-REG@{TWD2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWD2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWD2\_\-REG~TWDR}\label{ATmega32U6_8h_e5532ff1a52569720a9a44c1129772b0}




Definition at line 1031 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWD3\_\-REG@{TWD3\_\-REG}}
\index{TWD3\_\-REG@{TWD3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWD3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWD3\_\-REG~TWDR}\label{ATmega32U6_8h_d77199f21ac4f230028e9a9ef46cd4d0}




Definition at line 1032 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWD4\_\-REG@{TWD4\_\-REG}}
\index{TWD4\_\-REG@{TWD4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWD4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWD4\_\-REG~TWDR}\label{ATmega32U6_8h_1b9483e732fbd4df4e190ac5fe3dcc27}




Definition at line 1033 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWD5\_\-REG@{TWD5\_\-REG}}
\index{TWD5\_\-REG@{TWD5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWD5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWD5\_\-REG~TWDR}\label{ATmega32U6_8h_338062c276f9cbd3169637b05af3194a}




Definition at line 1034 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWD6\_\-REG@{TWD6\_\-REG}}
\index{TWD6\_\-REG@{TWD6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWD6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWD6\_\-REG~TWDR}\label{ATmega32U6_8h_d59dd12a1ce6f3c41ac0d42efc2fa9bd}




Definition at line 1035 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWD7\_\-REG@{TWD7\_\-REG}}
\index{TWD7\_\-REG@{TWD7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWD7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWD7\_\-REG~TWDR}\label{ATmega32U6_8h_597822a314109606cf186c2c209cead7}




Definition at line 1036 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWEA\_\-REG@{TWEA\_\-REG}}
\index{TWEA\_\-REG@{TWEA\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWEA\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWEA\_\-REG~TWCR}\label{ATmega32U6_8h_47bbd1562dc710e400f6821b92049c97}




Definition at line 871 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWEN\_\-REG@{TWEN\_\-REG}}
\index{TWEN\_\-REG@{TWEN\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWEN\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWEN\_\-REG~TWCR}\label{ATmega32U6_8h_32c9797ca7917c8a3ee36466c0fadb5e}




Definition at line 867 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWGCE\_\-REG@{TWGCE\_\-REG}}
\index{TWGCE\_\-REG@{TWGCE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWGCE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWGCE\_\-REG~TWAR}\label{ATmega32U6_8h_8aa44cc539b72201d371b113c7d071a6}




Definition at line 623 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWIE\_\-REG@{TWIE\_\-REG}}
\index{TWIE\_\-REG@{TWIE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWIE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWIE\_\-REG~TWCR}\label{ATmega32U6_8h_1f538b6acabd331860c94f40a1f04c35}




Definition at line 866 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWINT\_\-REG@{TWINT\_\-REG}}
\index{TWINT\_\-REG@{TWINT\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWINT\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWINT\_\-REG~TWCR}\label{ATmega32U6_8h_c735c510b13abfbcbf586ed0aff3d364}




Definition at line 872 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWPS0\_\-REG@{TWPS0\_\-REG}}
\index{TWPS0\_\-REG@{TWPS0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWPS0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWPS0\_\-REG~TWSR}\label{ATmega32U6_8h_31a045c22b12b87db286a6862d647d6c}




Definition at line 900 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWPS1\_\-REG@{TWPS1\_\-REG}}
\index{TWPS1\_\-REG@{TWPS1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWPS1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWPS1\_\-REG~TWSR}\label{ATmega32U6_8h_6bcc0a3bff4d75070d073b511c52a57d}




Definition at line 901 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWS3\_\-REG@{TWS3\_\-REG}}
\index{TWS3\_\-REG@{TWS3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWS3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWS3\_\-REG~TWSR}\label{ATmega32U6_8h_a80d04c0cfe488d895c325f69a02cc36}




Definition at line 902 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWS4\_\-REG@{TWS4\_\-REG}}
\index{TWS4\_\-REG@{TWS4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWS4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWS4\_\-REG~TWSR}\label{ATmega32U6_8h_99bd82dc5cc840f4824b7d2404162165}




Definition at line 903 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWS5\_\-REG@{TWS5\_\-REG}}
\index{TWS5\_\-REG@{TWS5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWS5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWS5\_\-REG~TWSR}\label{ATmega32U6_8h_704389eaf346061e30edcf4c1d47a159}




Definition at line 904 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWS6\_\-REG@{TWS6\_\-REG}}
\index{TWS6\_\-REG@{TWS6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWS6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWS6\_\-REG~TWSR}\label{ATmega32U6_8h_9bdbb9e6f024778a3aa11598452027ea}




Definition at line 905 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWS7\_\-REG@{TWS7\_\-REG}}
\index{TWS7\_\-REG@{TWS7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWS7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWS7\_\-REG~TWSR}\label{ATmega32U6_8h_8a099f9d306846be42e1327050fd0be9}




Definition at line 906 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWSTA\_\-REG@{TWSTA\_\-REG}}
\index{TWSTA\_\-REG@{TWSTA\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWSTA\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWSTA\_\-REG~TWCR}\label{ATmega32U6_8h_961fe987cb04a80696301d044f05b827}




Definition at line 870 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWSTO\_\-REG@{TWSTO\_\-REG}}
\index{TWSTO\_\-REG@{TWSTO\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWSTO\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWSTO\_\-REG~TWCR}\label{ATmega32U6_8h_38ebbdf5a0f71f8f236cc7eca67a24d7}




Definition at line 869 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TWWC\_\-REG@{TWWC\_\-REG}}
\index{TWWC\_\-REG@{TWWC\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TWWC\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TWWC\_\-REG~TWCR}\label{ATmega32U6_8h_de51e6dabbe1024a0001775bfb3dd329}




Definition at line 868 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TXB81\_\-REG@{TXB81\_\-REG}}
\index{TXB81\_\-REG@{TXB81\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TXB81\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TXB81\_\-REG~UCSR1B}\label{ATmega32U6_8h_f1e35eb861a375c7cf685bf4596db9b0}




Definition at line 979 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TXC1\_\-REG@{TXC1\_\-REG}}
\index{TXC1\_\-REG@{TXC1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TXC1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TXC1\_\-REG~UCSR1A}\label{ATmega32U6_8h_89df283c1d1d15b4e2b6728a472e3cdf}




Definition at line 1005 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TXCIE1\_\-REG@{TXCIE1\_\-REG}}
\index{TXCIE1\_\-REG@{TXCIE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TXCIE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TXCIE1\_\-REG~UCSR1B}\label{ATmega32U6_8h_21a43786ad7a93b75eb34acabc307af4}




Definition at line 985 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TXEN1\_\-REG@{TXEN1\_\-REG}}
\index{TXEN1\_\-REG@{TXEN1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TXEN1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TXEN1\_\-REG~UCSR1B}\label{ATmega32U6_8h_c2048136c6b88f50adcef209f51c2248}




Definition at line 982 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TXINE\_\-REG@{TXINE\_\-REG}}
\index{TXINE\_\-REG@{TXINE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TXINE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TXINE\_\-REG~UEIENX}\label{ATmega32U6_8h_00f1429564b17cb030ba25a7a656e5cf}




Definition at line 970 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!TXINI\_\-REG@{TXINI\_\-REG}}
\index{TXINI\_\-REG@{TXINI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[TXINI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define TXINI\_\-REG~UEINTX}\label{ATmega32U6_8h_fa74e1fd987c053bd021f6b6b3c672d0}




Definition at line 777 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!U2X1\_\-REG@{U2X1\_\-REG}}
\index{U2X1\_\-REG@{U2X1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[U2X1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define U2X1\_\-REG~UCSR1A}\label{ATmega32U6_8h_daccb2997bd14568a6f41db9acaed42b}




Definition at line 1000 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UADD0\_\-REG@{UADD0\_\-REG}}
\index{UADD0\_\-REG@{UADD0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UADD0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UADD0\_\-REG~UDADDR}\label{ATmega32U6_8h_e2a04755541761f25c522599f099a8e3}




Definition at line 1139 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UADD1\_\-REG@{UADD1\_\-REG}}
\index{UADD1\_\-REG@{UADD1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UADD1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UADD1\_\-REG~UDADDR}\label{ATmega32U6_8h_6579ba5a4d15be046b5fe7c601d48486}




Definition at line 1140 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UADD2\_\-REG@{UADD2\_\-REG}}
\index{UADD2\_\-REG@{UADD2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UADD2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UADD2\_\-REG~UDADDR}\label{ATmega32U6_8h_3efbecda5ee7c74040ac1f11b83d218b}




Definition at line 1141 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UADD3\_\-REG@{UADD3\_\-REG}}
\index{UADD3\_\-REG@{UADD3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UADD3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UADD3\_\-REG~UDADDR}\label{ATmega32U6_8h_a5a7308b6174f42b93fb2091ab4bb31c}




Definition at line 1142 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UADD4\_\-REG@{UADD4\_\-REG}}
\index{UADD4\_\-REG@{UADD4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UADD4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UADD4\_\-REG~UDADDR}\label{ATmega32U6_8h_4671b0b4544c89e98ef8c6ab0cb63c9a}




Definition at line 1143 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UADD5\_\-REG@{UADD5\_\-REG}}
\index{UADD5\_\-REG@{UADD5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UADD5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UADD5\_\-REG~UDADDR}\label{ATmega32U6_8h_08f35e750732068236385cbe1f228782}




Definition at line 1144 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UADD6\_\-REG@{UADD6\_\-REG}}
\index{UADD6\_\-REG@{UADD6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UADD6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UADD6\_\-REG~UDADDR}\label{ATmega32U6_8h_c5dea1069539128d870edc8829c9dfa4}




Definition at line 1145 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-0\_\-REG@{UBRR\_\-0\_\-REG}}
\index{UBRR\_\-0\_\-REG@{UBRR\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-0\_\-REG~UBRR1L}\label{ATmega32U6_8h_151592d5e376f05dd799fe031f270b54}




Definition at line 472 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-10\_\-REG@{UBRR\_\-10\_\-REG}}
\index{UBRR\_\-10\_\-REG@{UBRR\_\-10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-10\_\-REG~UBRR1H}\label{ATmega32U6_8h_7034e7cf03b40304f9a62ebdb1d040c8}




Definition at line 1080 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-11\_\-REG@{UBRR\_\-11\_\-REG}}
\index{UBRR\_\-11\_\-REG@{UBRR\_\-11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-11\_\-REG~UBRR1H}\label{ATmega32U6_8h_a155a194801e2f171b197bf30fe4d33a}




Definition at line 1081 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-1\_\-REG@{UBRR\_\-1\_\-REG}}
\index{UBRR\_\-1\_\-REG@{UBRR\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-1\_\-REG~UBRR1L}\label{ATmega32U6_8h_f0a39e509e09d3011ff3ca05f0ba5c6e}




Definition at line 473 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-2\_\-REG@{UBRR\_\-2\_\-REG}}
\index{UBRR\_\-2\_\-REG@{UBRR\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-2\_\-REG~UBRR1L}\label{ATmega32U6_8h_0075e4d4a6c15472c7908cddf573798c}




Definition at line 474 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-3\_\-REG@{UBRR\_\-3\_\-REG}}
\index{UBRR\_\-3\_\-REG@{UBRR\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-3\_\-REG~UBRR1L}\label{ATmega32U6_8h_e3d76c1d5f21a47866c7c9ef9ef5acd8}




Definition at line 475 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-4\_\-REG@{UBRR\_\-4\_\-REG}}
\index{UBRR\_\-4\_\-REG@{UBRR\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-4\_\-REG~UBRR1L}\label{ATmega32U6_8h_0ae3179f184c9fa6247b777819d96ec1}




Definition at line 476 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-5\_\-REG@{UBRR\_\-5\_\-REG}}
\index{UBRR\_\-5\_\-REG@{UBRR\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-5\_\-REG~UBRR1L}\label{ATmega32U6_8h_154412af04a007b59438a6c42bcc8be6}




Definition at line 477 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-6\_\-REG@{UBRR\_\-6\_\-REG}}
\index{UBRR\_\-6\_\-REG@{UBRR\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-6\_\-REG~UBRR1L}\label{ATmega32U6_8h_9eff5d7da4a9a60999dcc23f8ceddbfc}




Definition at line 478 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-7\_\-REG@{UBRR\_\-7\_\-REG}}
\index{UBRR\_\-7\_\-REG@{UBRR\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-7\_\-REG~UBRR1L}\label{ATmega32U6_8h_93e236ee15fedf875d58220573a628a2}




Definition at line 479 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-8\_\-REG@{UBRR\_\-8\_\-REG}}
\index{UBRR\_\-8\_\-REG@{UBRR\_\-8\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-8\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-8\_\-REG~UBRR1H}\label{ATmega32U6_8h_f658e8b13b9fedce5bdf3eb9c306c70e}




Definition at line 1078 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UBRR\_\-9\_\-REG@{UBRR\_\-9\_\-REG}}
\index{UBRR\_\-9\_\-REG@{UBRR\_\-9\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UBRR\_\-9\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UBRR\_\-9\_\-REG~UBRR1H}\label{ATmega32U6_8h_ceb6bdb818408e46ec2bd0b37d10f577}




Definition at line 1079 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UCPOL1\_\-REG@{UCPOL1\_\-REG}}
\index{UCPOL1\_\-REG@{UCPOL1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UCPOL1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UCPOL1\_\-REG~UCSR1C}\label{ATmega32U6_8h_fe94cfac19d1795b8c342de5193f36ac}




Definition at line 989 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UCSZ10\_\-REG@{UCSZ10\_\-REG}}
\index{UCSZ10\_\-REG@{UCSZ10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UCSZ10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UCSZ10\_\-REG~UCSR1C}\label{ATmega32U6_8h_97089c732ace6adb42b97427c624ad58}




Definition at line 990 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UCSZ11\_\-REG@{UCSZ11\_\-REG}}
\index{UCSZ11\_\-REG@{UCSZ11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UCSZ11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UCSZ11\_\-REG~UCSR1C}\label{ATmega32U6_8h_825ade0db58e7aabd7d7f6902df881b1}




Definition at line 991 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UCSZ12\_\-REG@{UCSZ12\_\-REG}}
\index{UCSZ12\_\-REG@{UCSZ12\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UCSZ12\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UCSZ12\_\-REG~UCSR1B}\label{ATmega32U6_8h_9cdb40260a4fa0c251f8251c0e77a55c}




Definition at line 981 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUMH\_\-0\_\-REG@{UDFNUMH\_\-0\_\-REG}}
\index{UDFNUMH\_\-0\_\-REG@{UDFNUMH\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUMH\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUMH\_\-0\_\-REG~UDFNUMH}\label{ATmega32U6_8h_448bb5e852765fd0cf0b098d34a28ca7}




Definition at line 1039 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUMH\_\-1\_\-REG@{UDFNUMH\_\-1\_\-REG}}
\index{UDFNUMH\_\-1\_\-REG@{UDFNUMH\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUMH\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUMH\_\-1\_\-REG~UDFNUMH}\label{ATmega32U6_8h_0a6ff10ca6e2ce60b88cdf7004e9cca0}




Definition at line 1040 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUMH\_\-2\_\-REG@{UDFNUMH\_\-2\_\-REG}}
\index{UDFNUMH\_\-2\_\-REG@{UDFNUMH\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUMH\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUMH\_\-2\_\-REG~UDFNUMH}\label{ATmega32U6_8h_ba3fcba404e579b9e8f00cea9ec99012}




Definition at line 1041 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUML\_\-0\_\-REG@{UDFNUML\_\-0\_\-REG}}
\index{UDFNUML\_\-0\_\-REG@{UDFNUML\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUML\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUML\_\-0\_\-REG~UDFNUML}\label{ATmega32U6_8h_1e4d92bff43a033c28d50820270cbfb7}




Definition at line 1019 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUML\_\-1\_\-REG@{UDFNUML\_\-1\_\-REG}}
\index{UDFNUML\_\-1\_\-REG@{UDFNUML\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUML\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUML\_\-1\_\-REG~UDFNUML}\label{ATmega32U6_8h_bc5215c0d8406f82bb2e735a1027d4e9}




Definition at line 1020 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUML\_\-2\_\-REG@{UDFNUML\_\-2\_\-REG}}
\index{UDFNUML\_\-2\_\-REG@{UDFNUML\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUML\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUML\_\-2\_\-REG~UDFNUML}\label{ATmega32U6_8h_c9e8972f2549ee72bbca0e392c42ffb6}




Definition at line 1021 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUML\_\-3\_\-REG@{UDFNUML\_\-3\_\-REG}}
\index{UDFNUML\_\-3\_\-REG@{UDFNUML\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUML\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUML\_\-3\_\-REG~UDFNUML}\label{ATmega32U6_8h_5e0900ac7de59be57f93bc2d71c166a4}




Definition at line 1022 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUML\_\-4\_\-REG@{UDFNUML\_\-4\_\-REG}}
\index{UDFNUML\_\-4\_\-REG@{UDFNUML\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUML\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUML\_\-4\_\-REG~UDFNUML}\label{ATmega32U6_8h_91704fa1247910b93bdd26852aa5a2c2}




Definition at line 1023 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUML\_\-5\_\-REG@{UDFNUML\_\-5\_\-REG}}
\index{UDFNUML\_\-5\_\-REG@{UDFNUML\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUML\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUML\_\-5\_\-REG~UDFNUML}\label{ATmega32U6_8h_06a3bd8ee6141d047b1476c77408faa9}




Definition at line 1024 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUML\_\-6\_\-REG@{UDFNUML\_\-6\_\-REG}}
\index{UDFNUML\_\-6\_\-REG@{UDFNUML\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUML\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUML\_\-6\_\-REG~UDFNUML}\label{ATmega32U6_8h_ff7c656fe52e9ef303f6833687c78ddd}




Definition at line 1025 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDFNUML\_\-7\_\-REG@{UDFNUML\_\-7\_\-REG}}
\index{UDFNUML\_\-7\_\-REG@{UDFNUML\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDFNUML\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDFNUML\_\-7\_\-REG~UDFNUML}\label{ATmega32U6_8h_a00ad28dc6ffab42939a97b86a9453c1}




Definition at line 1026 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDR1\_\-0\_\-REG@{UDR1\_\-0\_\-REG}}
\index{UDR1\_\-0\_\-REG@{UDR1\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDR1\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDR1\_\-0\_\-REG~UDR1}\label{ATmega32U6_8h_cae0f6b7c7b6b00ac9451e495bd7b265}




Definition at line 372 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDR1\_\-1\_\-REG@{UDR1\_\-1\_\-REG}}
\index{UDR1\_\-1\_\-REG@{UDR1\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDR1\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDR1\_\-1\_\-REG~UDR1}\label{ATmega32U6_8h_42f61cbac57d933ed816bef07f9c868b}




Definition at line 373 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDR1\_\-2\_\-REG@{UDR1\_\-2\_\-REG}}
\index{UDR1\_\-2\_\-REG@{UDR1\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDR1\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDR1\_\-2\_\-REG~UDR1}\label{ATmega32U6_8h_caf0c4d40d67e2b670641f5a2ecfef20}




Definition at line 374 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDR1\_\-3\_\-REG@{UDR1\_\-3\_\-REG}}
\index{UDR1\_\-3\_\-REG@{UDR1\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDR1\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDR1\_\-3\_\-REG~UDR1}\label{ATmega32U6_8h_5e083511f49c3fc6ccabf875b1e72c3f}




Definition at line 375 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDR1\_\-4\_\-REG@{UDR1\_\-4\_\-REG}}
\index{UDR1\_\-4\_\-REG@{UDR1\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDR1\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDR1\_\-4\_\-REG~UDR1}\label{ATmega32U6_8h_7766a52584a79d1d3b9412c985fadf18}




Definition at line 376 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDR1\_\-5\_\-REG@{UDR1\_\-5\_\-REG}}
\index{UDR1\_\-5\_\-REG@{UDR1\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDR1\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDR1\_\-5\_\-REG~UDR1}\label{ATmega32U6_8h_10db820a2fd1bc40b6dd5040c9475bc6}




Definition at line 377 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDR1\_\-6\_\-REG@{UDR1\_\-6\_\-REG}}
\index{UDR1\_\-6\_\-REG@{UDR1\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDR1\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDR1\_\-6\_\-REG~UDR1}\label{ATmega32U6_8h_9dafa8dcedc850c48624748f3627893b}




Definition at line 378 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDR1\_\-7\_\-REG@{UDR1\_\-7\_\-REG}}
\index{UDR1\_\-7\_\-REG@{UDR1\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDR1\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDR1\_\-7\_\-REG~UDR1}\label{ATmega32U6_8h_301a93861a539cb04f1d0a50d27c8c66}




Definition at line 379 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDRE1\_\-REG@{UDRE1\_\-REG}}
\index{UDRE1\_\-REG@{UDRE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDRE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDRE1\_\-REG~UCSR1A}\label{ATmega32U6_8h_5c0eed71630d7b0d5f036d54354d85f1}




Definition at line 1004 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UDRIE1\_\-REG@{UDRIE1\_\-REG}}
\index{UDRIE1\_\-REG@{UDRIE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UDRIE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UDRIE1\_\-REG~UCSR1B}\label{ATmega32U6_8h_e6fbd5b12b08c181aa2dab18a2860663}




Definition at line 984 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCHX\_\-0\_\-REG@{UEBCHX\_\-0\_\-REG}}
\index{UEBCHX\_\-0\_\-REG@{UEBCHX\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCHX\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCHX\_\-0\_\-REG~UEBCHX}\label{ATmega32U6_8h_da34e9b5650469d0cee8c802524a5202}




Definition at line 160 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCHX\_\-1\_\-REG@{UEBCHX\_\-1\_\-REG}}
\index{UEBCHX\_\-1\_\-REG@{UEBCHX\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCHX\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCHX\_\-1\_\-REG~UEBCHX}\label{ATmega32U6_8h_d690e18de019e624f8ba362a28ba009a}




Definition at line 161 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCHX\_\-2\_\-REG@{UEBCHX\_\-2\_\-REG}}
\index{UEBCHX\_\-2\_\-REG@{UEBCHX\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCHX\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCHX\_\-2\_\-REG~UEBCHX}\label{ATmega32U6_8h_c59193f1767f7d12daadc25445c10466}




Definition at line 162 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCLX\_\-0\_\-REG@{UEBCLX\_\-0\_\-REG}}
\index{UEBCLX\_\-0\_\-REG@{UEBCLX\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCLX\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCLX\_\-0\_\-REG~UEBCLX}\label{ATmega32U6_8h_a2f3aee65eef35b59eb9879d33a1f12d}




Definition at line 693 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCLX\_\-1\_\-REG@{UEBCLX\_\-1\_\-REG}}
\index{UEBCLX\_\-1\_\-REG@{UEBCLX\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCLX\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCLX\_\-1\_\-REG~UEBCLX}\label{ATmega32U6_8h_7c10b58f267ead534dbfe05efef13c0b}




Definition at line 694 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCLX\_\-2\_\-REG@{UEBCLX\_\-2\_\-REG}}
\index{UEBCLX\_\-2\_\-REG@{UEBCLX\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCLX\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCLX\_\-2\_\-REG~UEBCLX}\label{ATmega32U6_8h_c05505a99c4d20dddc91e2daab651067}




Definition at line 695 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCLX\_\-3\_\-REG@{UEBCLX\_\-3\_\-REG}}
\index{UEBCLX\_\-3\_\-REG@{UEBCLX\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCLX\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCLX\_\-3\_\-REG~UEBCLX}\label{ATmega32U6_8h_dbedb8eaaf547c8bbee549f11b7b7f10}




Definition at line 696 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCLX\_\-4\_\-REG@{UEBCLX\_\-4\_\-REG}}
\index{UEBCLX\_\-4\_\-REG@{UEBCLX\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCLX\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCLX\_\-4\_\-REG~UEBCLX}\label{ATmega32U6_8h_da049f1374e9438ec3dc31314f4de74a}




Definition at line 697 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCLX\_\-5\_\-REG@{UEBCLX\_\-5\_\-REG}}
\index{UEBCLX\_\-5\_\-REG@{UEBCLX\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCLX\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCLX\_\-5\_\-REG~UEBCLX}\label{ATmega32U6_8h_46f1c8804582c056e4b323faebb90529}




Definition at line 698 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCLX\_\-6\_\-REG@{UEBCLX\_\-6\_\-REG}}
\index{UEBCLX\_\-6\_\-REG@{UEBCLX\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCLX\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCLX\_\-6\_\-REG~UEBCLX}\label{ATmega32U6_8h_419031c8f4da2cea072350f9fba1a7bf}




Definition at line 699 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEBCLX\_\-7\_\-REG@{UEBCLX\_\-7\_\-REG}}
\index{UEBCLX\_\-7\_\-REG@{UEBCLX\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEBCLX\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEBCLX\_\-7\_\-REG~UEBCLX}\label{ATmega32U6_8h_e164ea3888f356503af4c36293784cb6}




Definition at line 700 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEDATX\_\-0\_\-REG@{UEDATX\_\-0\_\-REG}}
\index{UEDATX\_\-0\_\-REG@{UEDATX\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEDATX\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEDATX\_\-0\_\-REG~UEDATX}\label{ATmega32U6_8h_89d1236b0ef27f8130ed4b11a7f9b3b6}




Definition at line 392 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEDATX\_\-1\_\-REG@{UEDATX\_\-1\_\-REG}}
\index{UEDATX\_\-1\_\-REG@{UEDATX\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEDATX\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEDATX\_\-1\_\-REG~UEDATX}\label{ATmega32U6_8h_70758eb22045aeb29da0d5b60098ce11}




Definition at line 393 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEDATX\_\-2\_\-REG@{UEDATX\_\-2\_\-REG}}
\index{UEDATX\_\-2\_\-REG@{UEDATX\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEDATX\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEDATX\_\-2\_\-REG~UEDATX}\label{ATmega32U6_8h_9da169b6a936015e417c615c60987cef}




Definition at line 394 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEDATX\_\-3\_\-REG@{UEDATX\_\-3\_\-REG}}
\index{UEDATX\_\-3\_\-REG@{UEDATX\_\-3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEDATX\_\-3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEDATX\_\-3\_\-REG~UEDATX}\label{ATmega32U6_8h_455bed11d026e20ddc5a006e4f7c2353}




Definition at line 395 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEDATX\_\-4\_\-REG@{UEDATX\_\-4\_\-REG}}
\index{UEDATX\_\-4\_\-REG@{UEDATX\_\-4\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEDATX\_\-4\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEDATX\_\-4\_\-REG~UEDATX}\label{ATmega32U6_8h_faf6c0096cb850f1acf6abc321b6cb40}




Definition at line 396 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEDATX\_\-5\_\-REG@{UEDATX\_\-5\_\-REG}}
\index{UEDATX\_\-5\_\-REG@{UEDATX\_\-5\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEDATX\_\-5\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEDATX\_\-5\_\-REG~UEDATX}\label{ATmega32U6_8h_fa45568b856db60ec841d5be811d0d86}




Definition at line 397 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEDATX\_\-6\_\-REG@{UEDATX\_\-6\_\-REG}}
\index{UEDATX\_\-6\_\-REG@{UEDATX\_\-6\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEDATX\_\-6\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEDATX\_\-6\_\-REG~UEDATX}\label{ATmega32U6_8h_a3a7f13f1b3b54822e462976f26d530f}




Definition at line 398 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UEDATX\_\-7\_\-REG@{UEDATX\_\-7\_\-REG}}
\index{UEDATX\_\-7\_\-REG@{UEDATX\_\-7\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UEDATX\_\-7\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UEDATX\_\-7\_\-REG~UEDATX}\label{ATmega32U6_8h_d8ddf1092ef1b6f02904291ff42a44d5}




Definition at line 399 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UENUM\_\-0\_\-REG@{UENUM\_\-0\_\-REG}}
\index{UENUM\_\-0\_\-REG@{UENUM\_\-0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UENUM\_\-0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UENUM\_\-0\_\-REG~UENUM}\label{ATmega32U6_8h_d18936751a16d17178a57353b3899de6}




Definition at line 467 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UENUM\_\-1\_\-REG@{UENUM\_\-1\_\-REG}}
\index{UENUM\_\-1\_\-REG@{UENUM\_\-1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UENUM\_\-1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UENUM\_\-1\_\-REG~UENUM}\label{ATmega32U6_8h_bd32088d8c06bfeeaf7db61ad519d002}




Definition at line 468 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UENUM\_\-2\_\-REG@{UENUM\_\-2\_\-REG}}
\index{UENUM\_\-2\_\-REG@{UENUM\_\-2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UENUM\_\-2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UENUM\_\-2\_\-REG~UENUM}\label{ATmega32U6_8h_1f73f51c69c8b63df7ec8c9c67c20e67}




Definition at line 469 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UIDE\_\-REG@{UIDE\_\-REG}}
\index{UIDE\_\-REG@{UIDE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UIDE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UIDE\_\-REG~UHWCON}\label{ATmega32U6_8h_259eeab5152bc52b5f38d3db4eea5134}




Definition at line 635 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UIMOD\_\-REG@{UIMOD\_\-REG}}
\index{UIMOD\_\-REG@{UIMOD\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UIMOD\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UIMOD\_\-REG~UHWCON}\label{ATmega32U6_8h_aadf2635e94d79a899e203a1b030c4f2}




Definition at line 636 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UMSEL10\_\-REG@{UMSEL10\_\-REG}}
\index{UMSEL10\_\-REG@{UMSEL10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UMSEL10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UMSEL10\_\-REG~UCSR1C}\label{ATmega32U6_8h_9a5daec1917bda79c3a5c7bc85e294d6}




Definition at line 995 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UMSEL11\_\-REG@{UMSEL11\_\-REG}}
\index{UMSEL11\_\-REG@{UMSEL11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UMSEL11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UMSEL11\_\-REG~UCSR1C}\label{ATmega32U6_8h_bb94b3bbad0e5098a4a0c370b01e4f7b}




Definition at line 996 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UNDERFI\_\-REG@{UNDERFI\_\-REG}}
\index{UNDERFI\_\-REG@{UNDERFI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UNDERFI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UNDERFI\_\-REG~UESTA0X}\label{ATmega32U6_8h_af6d4efb7df57c8426171c27c0645c17}




Definition at line 1173 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UPE1\_\-REG@{UPE1\_\-REG}}
\index{UPE1\_\-REG@{UPE1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UPE1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UPE1\_\-REG~UCSR1A}\label{ATmega32U6_8h_aa7a382bdd59c9c4fe82abed140a4240}




Definition at line 1001 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UPM10\_\-REG@{UPM10\_\-REG}}
\index{UPM10\_\-REG@{UPM10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UPM10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UPM10\_\-REG~UCSR1C}\label{ATmega32U6_8h_70006563c6a26f522d8cf988691a9b8c}




Definition at line 993 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UPM11\_\-REG@{UPM11\_\-REG}}
\index{UPM11\_\-REG@{UPM11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UPM11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UPM11\_\-REG~UCSR1C}\label{ATmega32U6_8h_74b9e6e1db80ca68f517fa19b8d7efe1}




Definition at line 994 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UPRSME\_\-REG@{UPRSME\_\-REG}}
\index{UPRSME\_\-REG@{UPRSME\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UPRSME\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UPRSME\_\-REG~UDIEN}\label{ATmega32U6_8h_80c3b08896715349f989efccceeebd75}




Definition at line 180 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UPRSMI\_\-REG@{UPRSMI\_\-REG}}
\index{UPRSMI\_\-REG@{UPRSMI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UPRSMI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UPRSMI\_\-REG~UDINT}\label{ATmega32U6_8h_9cfd7e1c3a7e9b2fe785d41b3b0028ac}




Definition at line 218 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!USBE\_\-REG@{USBE\_\-REG}}
\index{USBE\_\-REG@{USBE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[USBE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define USBE\_\-REG~USBCON}\label{ATmega32U6_8h_73d8b9fa38b5d1a01bbbbc51c2745df2}




Definition at line 842 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!USBS1\_\-REG@{USBS1\_\-REG}}
\index{USBS1\_\-REG@{USBS1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[USBS1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define USBS1\_\-REG~UCSR1C}\label{ATmega32U6_8h_36744e60f95a4a66b7f64c92b682874b}




Definition at line 992 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UVCONE\_\-REG@{UVCONE\_\-REG}}
\index{UVCONE\_\-REG@{UVCONE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UVCONE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UVCONE\_\-REG~UHWCON}\label{ATmega32U6_8h_93ead1601c284207e2e72e2a6aae8070}




Definition at line 634 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!UVREGE\_\-REG@{UVREGE\_\-REG}}
\index{UVREGE\_\-REG@{UVREGE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[UVREGE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define UVREGE\_\-REG~UHWCON}\label{ATmega32U6_8h_7976f10e2653502312bb9200010ed519}




Definition at line 633 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!V\_\-REG@{V\_\-REG}}
\index{V\_\-REG@{V\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[V\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define V\_\-REG~SREG}\label{ATmega32U6_8h_dc5c29a5cd7ad49dd65b3d5543d81264}




Definition at line 460 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!VBUS\_\-REG@{VBUS\_\-REG}}
\index{VBUS\_\-REG@{VBUS\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[VBUS\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define VBUS\_\-REG~USBSTA}\label{ATmega32U6_8h_e5849b45a3ba16e13da42d5de1054542}




Definition at line 965 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!VBUSTE\_\-REG@{VBUSTE\_\-REG}}
\index{VBUSTE\_\-REG@{VBUSTE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[VBUSTE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define VBUSTE\_\-REG~USBCON}\label{ATmega32U6_8h_bba49dc6ac1ee7516dd66980549e0524}




Definition at line 837 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!VBUSTI\_\-REG@{VBUSTI\_\-REG}}
\index{VBUSTI\_\-REG@{VBUSTI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[VBUSTI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define VBUSTI\_\-REG~USBINT}\label{ATmega32U6_8h_0f1ff208961b9ed92318ec4c78dc2448}




Definition at line 599 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WAKEUPE\_\-REG@{WAKEUPE\_\-REG}}
\index{WAKEUPE\_\-REG@{WAKEUPE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WAKEUPE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WAKEUPE\_\-REG~UDIEN}\label{ATmega32U6_8h_031563a92463079bea60d815bd19f635}




Definition at line 178 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WAKEUPI\_\-REG@{WAKEUPI\_\-REG}}
\index{WAKEUPI\_\-REG@{WAKEUPI\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WAKEUPI\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WAKEUPI\_\-REG~UDINT}\label{ATmega32U6_8h_c28a49397805a7dea76525f1eaa5903a}




Definition at line 216 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WCOL\_\-REG@{WCOL\_\-REG}}
\index{WCOL\_\-REG@{WCOL\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WCOL\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WCOL\_\-REG~SPSR}\label{ATmega32U6_8h_8690f4e7baac3f8ebb35ab606e72926f}




Definition at line 269 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WDCE\_\-REG@{WDCE\_\-REG}}
\index{WDCE\_\-REG@{WDCE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WDCE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WDCE\_\-REG~WDTCSR}\label{ATmega32U6_8h_09b8a372add8b4e03dd2d48af366873c}




Definition at line 187 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WDE\_\-REG@{WDE\_\-REG}}
\index{WDE\_\-REG@{WDE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WDE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WDE\_\-REG~WDTCSR}\label{ATmega32U6_8h_68a534a0c5a59a929e184874ac9ea541}




Definition at line 186 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WDIE\_\-REG@{WDIE\_\-REG}}
\index{WDIE\_\-REG@{WDIE\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WDIE\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WDIE\_\-REG~WDTCSR}\label{ATmega32U6_8h_5bb401bda2071e4416f81c2fa26a3d7d}




Definition at line 189 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WDIF\_\-REG@{WDIF\_\-REG}}
\index{WDIF\_\-REG@{WDIF\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WDIF\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WDIF\_\-REG~WDTCSR}\label{ATmega32U6_8h_ce95db9638b9dd95b4332e5a9eee338b}




Definition at line 190 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WDP0\_\-REG@{WDP0\_\-REG}}
\index{WDP0\_\-REG@{WDP0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WDP0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WDP0\_\-REG~WDTCSR}\label{ATmega32U6_8h_fccf8ccff2dddf330d1f5f8875fad1f6}




Definition at line 183 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WDP1\_\-REG@{WDP1\_\-REG}}
\index{WDP1\_\-REG@{WDP1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WDP1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WDP1\_\-REG~WDTCSR}\label{ATmega32U6_8h_79c1ffde21945ce60b0afaf033c9980a}




Definition at line 184 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WDP2\_\-REG@{WDP2\_\-REG}}
\index{WDP2\_\-REG@{WDP2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WDP2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WDP2\_\-REG~WDTCSR}\label{ATmega32U6_8h_b8152b6da120a011179dc54061670ac5}




Definition at line 185 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WDP3\_\-REG@{WDP3\_\-REG}}
\index{WDP3\_\-REG@{WDP3\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WDP3\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WDP3\_\-REG~WDTCSR}\label{ATmega32U6_8h_fd294c509a61d6df051e540ab7be192e}




Definition at line 188 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WDRF\_\-REG@{WDRF\_\-REG}}
\index{WDRF\_\-REG@{WDRF\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WDRF\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WDRF\_\-REG~MCUSR}\label{ATmega32U6_8h_8733752726a2bd869e92714e64e0714b}




Definition at line 849 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM00\_\-REG@{WGM00\_\-REG}}
\index{WGM00\_\-REG@{WGM00\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM00\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM00\_\-REG~TCCR0A}\label{ATmega32U6_8h_7d46975ec4154199bf50380121ce600e}




Definition at line 650 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM01\_\-REG@{WGM01\_\-REG}}
\index{WGM01\_\-REG@{WGM01\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM01\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM01\_\-REG~TCCR0A}\label{ATmega32U6_8h_67cab651d9a52a906ef4c4394b7599bf}




Definition at line 651 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM02\_\-REG@{WGM02\_\-REG}}
\index{WGM02\_\-REG@{WGM02\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM02\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM02\_\-REG~TCCR0B}\label{ATmega32U6_8h_14aec6e45f5112cedf2524c61386e08f}




Definition at line 642 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM10\_\-REG@{WGM10\_\-REG}}
\index{WGM10\_\-REG@{WGM10\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM10\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM10\_\-REG~TCCR1A}\label{ATmega32U6_8h_8386f95ea03a1d528d6cbf6ed6d276fa}




Definition at line 512 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM11\_\-REG@{WGM11\_\-REG}}
\index{WGM11\_\-REG@{WGM11\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM11\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM11\_\-REG~TCCR1A}\label{ATmega32U6_8h_f6f01fc86adb28e5bc25c6cec893bf51}




Definition at line 513 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM12\_\-REG@{WGM12\_\-REG}}
\index{WGM12\_\-REG@{WGM12\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM12\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM12\_\-REG~TCCR1B}\label{ATmega32U6_8h_b2e99bfd4f6ec85c547b6c907ac95d46}




Definition at line 535 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM13\_\-REG@{WGM13\_\-REG}}
\index{WGM13\_\-REG@{WGM13\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM13\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM13\_\-REG~TCCR1B}\label{ATmega32U6_8h_2cc5c4157481bce6d6dd7108d0db5946}




Definition at line 536 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM20\_\-REG@{WGM20\_\-REG}}
\index{WGM20\_\-REG@{WGM20\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM20\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM20\_\-REG~TCCR2A}\label{ATmega32U6_8h_678932b270ce6f5588568d940a79519d}




Definition at line 878 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM21\_\-REG@{WGM21\_\-REG}}
\index{WGM21\_\-REG@{WGM21\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM21\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM21\_\-REG~TCCR2A}\label{ATmega32U6_8h_c6447b2f85b400700d814b96566bf9ea}




Definition at line 879 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM22\_\-REG@{WGM22\_\-REG}}
\index{WGM22\_\-REG@{WGM22\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM22\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM22\_\-REG~TCCR2B}\label{ATmega32U6_8h_f992ca6e60c369cf6623f0585b69ed5f}




Definition at line 889 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM30\_\-REG@{WGM30\_\-REG}}
\index{WGM30\_\-REG@{WGM30\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM30\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM30\_\-REG~TCCR3A}\label{ATmega32U6_8h_a2836ce61d2a14a4b6432f066fdf970b}




Definition at line 767 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM31\_\-REG@{WGM31\_\-REG}}
\index{WGM31\_\-REG@{WGM31\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM31\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM31\_\-REG~TCCR3A}\label{ATmega32U6_8h_7033ac28a097b17cb66d4fc516e0cbcd}




Definition at line 768 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM32\_\-REG@{WGM32\_\-REG}}
\index{WGM32\_\-REG@{WGM32\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM32\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM32\_\-REG~TCCR3B}\label{ATmega32U6_8h_4958be8902307c657d4550ef84c6939f}




Definition at line 761 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!WGM33\_\-REG@{WGM33\_\-REG}}
\index{WGM33\_\-REG@{WGM33\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[WGM33\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define WGM33\_\-REG~TCCR3B}\label{ATmega32U6_8h_06d89fcb4adc38b204b5384a7771d41d}




Definition at line 762 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!XMBK\_\-REG@{XMBK\_\-REG}}
\index{XMBK\_\-REG@{XMBK\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[XMBK\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define XMBK\_\-REG~XMCRB}\label{ATmega32U6_8h_6ed9f5a43590c00b5e91f1570e9e81ff}




Definition at line 1272 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!XMM0\_\-REG@{XMM0\_\-REG}}
\index{XMM0\_\-REG@{XMM0\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[XMM0\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define XMM0\_\-REG~XMCRB}\label{ATmega32U6_8h_a32f7a3e3ab38b53ca3f3e0bf76b014e}




Definition at line 1269 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!XMM1\_\-REG@{XMM1\_\-REG}}
\index{XMM1\_\-REG@{XMM1\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[XMM1\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define XMM1\_\-REG~XMCRB}\label{ATmega32U6_8h_34664699908c13931b0875a2a47da9ce}




Definition at line 1270 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!XMM2\_\-REG@{XMM2\_\-REG}}
\index{XMM2\_\-REG@{XMM2\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[XMM2\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define XMM2\_\-REG~XMCRB}\label{ATmega32U6_8h_7ea87d53dadb1195ed303eb048dc90a6}




Definition at line 1271 of file ATmega32U6.h.\index{ATmega32U6.h@{ATmega32U6.h}!Z\_\-REG@{Z\_\-REG}}
\index{Z\_\-REG@{Z\_\-REG}!ATmega32U6.h@{ATmega32U6.h}}
\subsubsection[Z\_\-REG]{\setlength{\rightskip}{0pt plus 5cm}\#define Z\_\-REG~SREG}\label{ATmega32U6_8h_c14906b36c9bea67d3374e5015a1d0a2}




Definition at line 458 of file ATmega32U6.h.